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drivers: i2c: spi: litex: support interrupts #91050

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support interrupts for rx_ready, so we can use the
time we are waiting for other stuff.

};

struct spi_litex_data {
struct spi_context ctx;
uint8_t dfs; /* dfs in bytes: 1,2 or 4 */
#if SPI_LITEX_ANY_HAS_IRQ
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Move it above dfs

const struct spi_litex_dev_config *dev_config = dev->config;

if (litex_read8(dev_config->core_master_ev_pending_addr) & BIT(0)) {
k_sem_give(&data->sem_rx_ready);
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You should handle Rx directly in isr mode, it will be much faster, no need of any smartphone then.

@maass-hamburg maass-hamburg force-pushed the litex_i2c_spi_irq_add branch from 1b0c030 to 3a14073 Compare June 27, 2025 10:57
@github-actions github-actions bot added the area: RISCV RISCV Architecture (32-bit & 64-bit) label Jun 27, 2025
@maass-hamburg maass-hamburg force-pushed the litex_i2c_spi_irq_add branch 2 times, most recently from 0e3ee4c to 8755b51 Compare July 1, 2025 10:57
@github-actions github-actions bot requested a review from masz-nordic July 7, 2025 10:26
support interrupts for rx_ready, so we can use the
time we are waiting for other stuff.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
remove warnings from CI.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
LiteSPI now has support for multiple CS.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
remove `core_` prefix from code and
register names, got dropped in litex in
enjoy-digital/litex#2253

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
support interrupts for rx_ready, so we can use the
time we are waiting for other stuff.

implement async spi transfers.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg maass-hamburg force-pushed the litex_i2c_spi_irq_add branch from 4dbaa33 to e027a83 Compare July 8, 2025 13:26
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area: I2C area: RISCV RISCV Architecture (32-bit & 64-bit) area: SPI SPI bus platform: LiteX
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5 participants