@@ -236,7 +236,9 @@ static int spi_litex_xfer(const struct device *dev, const struct spi_config *con
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spi_litex_spi_do_rx (dev );
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} while (spi_context_tx_on (ctx ) || spi_context_rx_on (ctx ));
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- litex_write32 (0 , dev_config -> master_cs_addr );
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+ if ((config -> operation & SPI_HOLD_ON_CS ) == 0 ) {
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+ litex_write32 (0 , dev_config -> master_cs_addr );
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+ }
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spi_context_complete (ctx , dev , 0 );
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@@ -305,6 +307,13 @@ static int spi_litex_transceive_async(const struct device *dev,
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static int spi_litex_release (const struct device * dev , const struct spi_config * config )
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{
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struct spi_litex_data * data = dev -> data ;
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+ const struct spi_litex_dev_config * dev_config = dev -> config ;
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+
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+ if (!spi_context_configured (& data -> ctx , config )) {
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+ return - EINVAL ;
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+ }
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+
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+ litex_write32 (0 , dev_config -> master_cs_addr );
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spi_context_unlock_unconditionally (& data -> ctx );
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return 0 ;
@@ -328,7 +337,9 @@ static void spi_litex_irq_handler(const struct device *dev)
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} else {
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litex_write8 (0 , dev_config -> master_ev_enable_addr );
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- litex_write32 (0 , dev_config -> master_cs_addr );
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+ if ((ctx -> config -> operation & SPI_HOLD_ON_CS ) == 0 ) {
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+ litex_write32 (0 , dev_config -> master_cs_addr );
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+ }
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spi_context_complete (ctx , dev , 0 );
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}
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