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@Martinhoff-maker Martinhoff-maker commented Apr 22, 2025

The goal of this PR to add the symbol SRAM_ISR_EXEC_CONTEXT.

It relocates all the vector table and the necessary files (isr_wrapper,...) in SRAM in order to have a fully SRAM context when an interruption is triggered (except if it's to get out of idle state with CONFIG_PM=y). It remains to the user to place ISR callbacks and the ISR dependencies in RAM. This option allow to not get latency (by accessing flash) when an interrupt is triggered in a real time application.

I know that in the case we only want the sw_isr_table in RAM (with SRAM_SW_ISR_TABLE) , write permission is not needed but it is only to simplify the modification for the moment.

I also know that the new symbol SRAM_ISR_EXEC_CONTEXT depends on the fact that the necessary files is relocated for each arch. I only do the work for cortex-m then other arch that activate the symbol might not be fully in an SRAM context. (I don't know how to inform user about this other than introducing a new ARCH_HAS_SRAM_CONTEXT_AVAILABLE (and make SRAM_ISR_EXEC_CONTEXT depends on it) but it doesn't seems right...

@Martinhoff-maker Martinhoff-maker force-pushed the isr_vector_table_in_ram branch 2 times, most recently from f3dbdcc to 7f3639c Compare April 22, 2025 08:16
@Martinhoff-maker Martinhoff-maker force-pushed the isr_vector_table_in_ram branch 3 times, most recently from 0dc9298 to 63618b7 Compare April 25, 2025 14:43
@Martinhoff-maker Martinhoff-maker marked this pull request as ready for review April 25, 2025 15:27
@github-actions github-actions bot added area: Linker Scripts area: Build System area: ARM64 ARM (64-bit) Architecture Release Notes To be mentioned in the release notes area: Architectures area: ARM ARM (32-bit) Architecture labels Apr 25, 2025
@danieldegrasse
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Not inherently opposed to the idea here, but this seems like a slippery slope. If you are trying to avoid all flash access during an ISR, this change won't be sufficient (data like device pointers may still be in flash, even if you move relevant ISR handers). As it stands, I'm kind of unclear what the advantage of this change is over turning on CONFIG_DYNAMIC_INTERRUPTS and directly relocating architecture files from your application CMakeLists.

Is there something I'm missing here, or is this Kconfig currently mostly for convenience (IE something you could accomplish within your application with a bit more work)?

@Martinhoff-maker
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Thanks for the review @danieldegrasse. I'm currently aware about the device pointer. I'm trying to be as generic as possible and in the case that you relocate an ISR that is not related to a driver, you don't need that part. The whole point is to have a starting point for people who trying to have a real time constraint on an ISR. That's why I say, even in the Kconfig helper, that the relocation of the ISR handler and all of his dependency (and this includes device struct for example) must be done by the user.

CONFIG_DYNAMIC_INTERRUPT include a lot of files that we don't need for this feature, that's why I prefer to split it into 2 parts.

However, It needs to be well documented I think in order to not be a slippery option (explain what user have to take care about in case of a driver, and also how to identify the dependency of the ISR handler (with Puncover for example)).

@danieldegrasse
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Thanks for the review @danieldegrasse. I'm currently aware about the device pointer. I'm trying to be as generic as possible and in the case that you relocate an ISR that is not related to a driver, you don't need that part. The whole point is to have a starting point for people who trying to have a real time constraint on an ISR. That's why I say, even in the Kconfig helper, that the relocation of the ISR handler and all of his dependency (and this includes device struct for example) must be done by the user.

CONFIG_DYNAMIC_INTERRUPT include a lot of files that we don't need for this feature, that's why I prefer to split it into 2 parts.

However, It needs to be well documented I think in order to not be a slippery option (explain what user have to take care about in case of a driver, and also how to identify the dependency of the ISR handler (with Puncover for example)).

That makes sense regarding CONFIG_DYNAMIC_INTERRUPT. Could we do something like the following?

  • make CONFIG_SRAM_SW_ISR_TABLE a user-selectable Kconfig, that CONFIG_DYNAMIC_INTERRUPT enables
  • Rely on the user to enable CONFIG_SRAM_VECTOR_TABLE, CONFIG_SRAM_SW_ISR_TABLE, and use zephyr_code_relocate to move files to SRAM

I think my core concern is how many caveats we have to place on the Kconfig SRAM_ISR_EXEC_CONTEXT- I worry that it will lead users to turn this on without fully understanding what is and isn't relocated, whereas if they can set CONFIG_SRAM_SW_ISR_TABLE they have a good idea of what Zephyr has located in RAM, and what they need to relocate themselves.

@Martinhoff-maker Martinhoff-maker force-pushed the isr_vector_table_in_ram branch from 63618b7 to 269a2fe Compare May 5, 2025 14:39
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I totally agree with what you are saying. I just fear that somebody who wants to have an ISR RAM context will have to go through all the works that I have already done (for cortex-M). Maybe the only expression of this work might be a good documentation but where ? maybe in the code relocation ? or in the interrupt documentation ?

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I totally agree with what you are saying. I just fear that somebody who wants to have an ISR RAM context will have to go through all the works that I have already done (for cortex-M). Maybe the only expression of this work might be a good documentation but where ? maybe in the code relocation ? or in the interrupt documentation ?

What about adding a sample demonstrating how to perform the relocation? That way users have somewhere to start and some documentation on how to continue from there

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I totally agree with what you are saying. I just fear that somebody who wants to have an ISR RAM context will have to go through all the works that I have already done (for cortex-M). Maybe the only expression of this work might be a good documentation but where ? maybe in the code relocation ? or in the interrupt documentation ?

What about adding a sample demonstrating how to perform the relocation? That way users have somewhere to start and some documentation on how to continue from there

+1 for having sample/test which can be verified in ci. Also, could this be used for boards like mps3/corstone310/fvp which have low itcm? I spent a lot of time last time trying to find something working for this board before I got this, but I am wondering if this new config would have made things easier. or maybe I misunderstood how this new config is used which again suggests that a sample would help.

@Martinhoff-maker
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Martinhoff-maker commented Jun 20, 2025

Agree with all of you, I will replace my last commit with an example.

@Martinhoff-maker Martinhoff-maker force-pushed the isr_vector_table_in_ram branch 3 times, most recently from 832a3db to f90b7be Compare June 26, 2025 13:09
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V2:

  • Rebased with the latest upstream
  • Reverted my last commit regarding the new symbol SRAM_ISR_EXEC_CONTEXT
  • Added a test that shows how to enable an SRAM based context for ISR

@Martinhoff-maker Martinhoff-maker force-pushed the isr_vector_table_in_ram branch from f90b7be to 7a3725a Compare June 27, 2025 09:19
wearyzen
wearyzen previously approved these changes Jul 7, 2025
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wearyzen commented Jul 7, 2025

it would be good to resolve the small sonarqube issue but otherwise LGTM. Thanks for adding the example.

@Martinhoff-maker
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V3:

  • Correction of sonarqube issue.

Btw, I feel that this PR will not be merged for zephyr 4.2 so I think I have to create migration-guide-4.3 ?

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wearyzen commented Jul 8, 2025

V3:

  • Correction of sonarqube issue.

Btw, I feel that this PR will not be merged for zephyr 4.2 so I think I have to create migration-guide-4.3 ?

oh right, both docs should be 4.3 now instead

This commit introduces the SRAM_SW_ISR_TABLE option which is selected by
DYNAMIC_INTERRUPT. It allows splitting the DYNAMIC_INTERRUPT option into
two parts:

 - One for the relocation of the ISR vector table in RAM
 - One for the inclusion of functions needed to install ISRs dynamically

The goal is to later only select the relocation of the ISR vector table in
RAM and not all the associated functions from the dynamic interrupt
mechanism.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
This commit introduces the new test ram_context_for_isr that shows
how to configure an application (prj.conf, CMakeLists.txt, etc.) in
order to enable full ISR execution with a RAM context.

It resolves the issue of flash latency affecting real-time constraints
during ISR execution.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
@Martinhoff-maker Martinhoff-maker force-pushed the isr_vector_table_in_ram branch from 0d8a8bf to 2799d8f Compare July 15, 2025 09:43
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V4:

  • Rebase with the latest upstream
  • Move from 4.2 to 4.3 doc (migration guide and release)

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