arch: Add sram_isr_exec_context symbol

The goal of this symbol is to have all the interrupt context in SRAM in
order to avoid flash latency in case of real time constraints. It is
actually not compatible with TRACING_ISR by default otherwise it means
that all the tracing susbys have to be in SRAM.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>

Author: Martinhoff-maker

arch/Kconfig

@@ -589,6 +589,21 @@ config SRAM_SW_ISR_TABLE
 	  The option specifies that the software interrupts vector table will be
 	  placed inside SRAM instead of the flash.
 
+config SRAM_ISR_EXEC_CONTEXT
+	bool "Interruption context in SRAM"
+	select SRAM_VECTOR_TABLE
+	select SRAM_SW_ISR_TABLE
+	select CODE_DATA_RELOCATION
+	# In case you want to remove this dependency, place all code for the tracing susbys in RAM
+	depends on !TRACING_ISR
+	help
+	  Relocate all the vector table and the necessary files (isr_wrapper)
+	  in SRAM in order to have a fully SRAM context when an interruption is triggered.
+	  (except if it's to get out of idle state with CONFIG_PM=y)
+	  It remains to the user to place ISR callbacks and their dependencies in RAM.
+	  This option allows to not get latency (by accessing flash) when an interrupt is triggered
+	  in a real time application.
+
 config IRQ_OFFLOAD_NESTED
 	bool "irq_offload() supports nested IRQs"
 	depends on IRQ_OFFLOAD

arch/arm/core/cortex_m/CMakeLists.txt

@@ -71,3 +71,8 @@ zephyr_linker_sources_ifdef(CONFIG_SRAM_VECTOR_TABLE
   ram_vector_table.ld
 )
 endif()
+
+if(CONFIG_SRAM_ISR_EXEC_CONTEXT)
+  zephyr_code_relocate(FILES ${ZEPHYR_BASE}/arch/arm/core/cortex_m/isr_wrapper.c LOCATION RAM)
+  zephyr_code_relocate(FILES ${ZEPHYR_BASE}/arch/arm/core/cortex_m/irq_init.c LOCATION RAM)
+endif()

doc/releases/release-notes-4.2.rst

@@ -112,6 +112,7 @@ New APIs and options
   * :kconfig:option:`CONFIG_SRAM_VECTOR_TABLE` moved from ``zephyr/Kconfig.zephyr`` to
     ``zephyr/arch/Kconfig`` and added dependencies to it.
   * :kconfig:option:`CONFIG_SRAM_SW_ISR_TABLE`
+  * :kconfig:option:`CONFIG_SRAM_ISR_EXEC_CONTEXT`
 
 * Kernel