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tests: application_development: add new test for ram-based isr
This commit introduces the new test ram_context_for_isr that shows how to configure an application (prj.conf, CMakeLists.txt, etc.) in order to enable full ISR execution with a RAM context. It resolves the issue of flash latency affecting real-time constraints during ISR execution. Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
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‎tests/application_development/ram_context_for_isr/CMakeLists.txt

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# Copyright (c) 2025 Silicon Laboratories Inc.
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# SPDX-License-Identifier: Apache-2.0
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(ram_context_for_isr)
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FILE(GLOB app_sources src/*.c)
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target_sources(app PRIVATE ${app_sources})
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zephyr_include_directories(${CMAKE_CURRENT_SOURCE_DIR}/include)
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if(CONFIG_CPU_CORTEX_M_HAS_VTOR)
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zephyr_code_relocate(FILES ${ZEPHYR_BASE}/arch/arm/core/cortex_m/isr_wrapper.c LOCATION RAM)
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zephyr_code_relocate(FILES ${ZEPHYR_BASE}/arch/arm/core/cortex_m/exc_exit.c LOCATION RAM)
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endif()
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zephyr_code_relocate(FILES ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c FILTER ".test_irq_callback" LOCATION RAM )
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zephyr_code_relocate(FILES ${CMAKE_CURRENT_SOURCE_DIR}/src/fake_driver.c FILTER ".fake_driver_isr" LOCATION RAM )
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# Only needed because the fake driver is defined in tests folder
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zephyr_linker_sources(SECTIONS sections-rom.ld)

‎tests/application_development/ram_context_for_isr/README.rst

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.. _vector_table_relocation:
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RAM Context for ISR
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###################
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Overview
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********
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A test that verifies the ISR vector table relocation and
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full IRQ execution under RAM context.
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Test Description
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****************
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This test verifies that interrupt service routines (ISRs), their callbacks, and the driver code
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can be fully relocated to RAM, ensuring that all interrupt handling occurs from SRAM rather than
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flash. This is important for real-time applications where minimizing interrupt latency is critical.
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The test uses a simple "fake driver" that registers an IRQ callback. The following aspects are
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validated:
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- The vector table and ISR wrapper are relocated to SRAM.
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- The fake driver's ISR and the registered callback are also located in SRAM.
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- When the interrupt is triggered, the callback and all relevant code execute from RAM, not flash.
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- The test asserts at runtime that the addresses of the callback, driver ISR, and ISR wrapper are
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within the SRAM address range.
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Test Steps
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**********
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1. The test registers a callback with the fake driver.
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2. It triggers the interrupt (IRQ 27).
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3. The callback checks (using assertions) that:
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- Its own address,
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- The driver's ISR address,
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- The ISR wrapper address,
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- And the device structure,
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are all within the SRAM region.
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4. The test passes if all assertions succeed and the callback is executed.
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Configuration
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*************
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The test is configured with the following options in prj.conf:
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- ``CONFIG_SRAM_VECTOR_TABLE=y``: Relocate the vector table to SRAM.
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- ``CONFIG_SRAM_SW_ISR_TABLE=y``: Relocate the software ISR table to SRAM.
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- ``CONFIG_CODE_DATA_RELOCATION=y``: Enable code/data relocation to SRAM.
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- ``CONFIG_DEVICE_MUTABLE=y``: Allow device structures to be mutable (in RAM).
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- ``CONFIG_ZTEST=y``: Enable Zephyr's test framework.
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The test is only supported on ARM Cortex-M platforms with VTOR (Vector Table Offset Register) support.
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Advanced Configuration and Limitations
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**************************************
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Configuration Options in testcase.yaml
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======================================
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By default, the test disables several options in testcase.yaml:
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- ``CONFIG_TRACING_ISR=n``: Disables ISR tracing.
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**If enabled:** Enabling ISR tracing adds hooks to trace ISR entry/exit, which may introduce
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additional code paths not relocated to RAM. This can increase interrupt latency and may cause
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some tracing code to execute from flash, partially defeating the purpose of full RAM relocation.
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- ``CONFIG_STACK_SENTINEL=n``: Disables stack overflow detection sentinels.
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**If enabled:** Enabling stack sentinels adds extra checks to detect stack overflows. These
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checks may reside in flash and be called during interrupt handling, potentially increasing
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latency and causing some code to execute from flash.
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- ``CONFIG_PM=n``: Disables power management.
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**If enabled:** Enabling power management may cause the system to enter low-power states. Some
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wake-up interrupts may not use the relocated vector table in RAM, and the system may revert to
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using the flash-based vector table to exit idle states. This can result in some ISRs or their
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wrappers executing from flash, especially during wake-up from deep sleep.
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**Summary:**
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If you enable any of these options, ensure all code paths executed during interrupt handling are
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also relocated to RAM to maintain the lowest possible interrupt latency. Otherwise, some code may
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still execute from flash, increasing latency and partially defeating the test's purpose.
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Driver API Location and Limitations
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===================================
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**Important Note:**
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While the test ensures ISR, callback, and device structures are relocated to RAM, the driver API
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structure (``struct fake_driver_api``)—containing function pointers for driver methods—is not
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relocated to RAM by default. This structure typically resides in flash (ROM) as device constant data.
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As long as you don't call the driver API during ISR execution, the current configuration is sufficient.
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However, if you need to call driver API functions from within an ISR, you must relocate the driver API
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structure to RAM. The simplest approach is to relocate the entire driver file to RAM rather than just
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the ISR symbol.

‎tests/application_development/ram_context_for_isr/app.overlay

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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fakedriver: fakedriver@E0000000 {
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compatible = "fakedriver";
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reg = <0xE0000000 0x2000>;
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zephyr,mutable;
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status = "okay";
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};
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};

‎tests/application_development/ram_context_for_isr/dts/bindings/fakedriver.yml

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# Copyright (c) 2025 Silicon Laboratories
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# SPDX-License-Identifier: Apache-2.0
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description: Properties for fake driver.
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compatible: "fakedriver"
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include: [base.yaml, mutable.yaml]

‎tests/application_development/ram_context_for_isr/include/fake_driver.h

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_FAKE_DRIVER_H_
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#define ZEPHYR_INCLUDE_DRIVERS_FAKE_DRIVER_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef void (*fake_driver_irq_callback_t)(const struct device *dev, void *user_data);
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struct fake_driver_config {
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void (*irq_config_func)(void);
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uint8_t irq_num;
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uint8_t irq_priority;
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};
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struct fake_driver_data {
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fake_driver_irq_callback_t irq_callback;
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void *user_data;
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};
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__subsystem struct fake_driver_api {
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int (*configure)(const struct device *dev, int config);
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int (*register_irq_callback)(const struct device *dev, fake_driver_irq_callback_t cb,
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void *user_data);
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_DRIVERS_FAKE_DRIVER_H_ */

‎tests/application_development/ram_context_for_isr/prj.conf

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CONFIG_COVERAGE=n
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CONFIG_ZTEST=y
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CONFIG_SRAM_VECTOR_TABLE=y
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CONFIG_SRAM_SW_ISR_TABLE=y
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_DEVICE_MUTABLE=y

‎tests/application_development/ram_context_for_isr/sections-rom.ld

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/linker/iterable_sections.h>
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/* Only needed because the driver is defined in tests folder */
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ITERABLE_SECTION_ROM(fake_driver_api, Z_LINK_ITERABLE_SUBALIGN)

‎tests/application_development/ram_context_for_isr/src/fake_driver.c

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/irq.h>
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#include "fake_driver.h"
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#define DT_DRV_COMPAT fakedriver
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#define TEST_IRQ_NUM 27
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#define TEST_IRQ_PRIO 4
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static void fake_driver_isr(const void *arg)
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{
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const struct device *dev = (const struct device *)arg;
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struct fake_driver_data *data = dev->data;
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/* Store the address of fake_driver_isr in user_data because it will be optimized by the
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* compiler (even with __noinline__ attribute)
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*/
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data->user_data = (void *)&fake_driver_isr;
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if (data->irq_callback != NULL) {
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data->irq_callback(dev, data->user_data);
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}
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}
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static int fake_driver_configure(const struct device *dev, int config)
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{
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return 0;
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}
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static int fake_driver_register_irq_callback(const struct device *dev,
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fake_driver_irq_callback_t cb, void *user_data)
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{
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struct fake_driver_data *data = dev->data;
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data->irq_callback = cb;
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data->user_data = user_data;
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return 0;
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}
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DEVICE_API(fake, fake_driver_func) = {
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.configure = fake_driver_configure,
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.register_irq_callback = fake_driver_register_irq_callback,
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};
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static int fake_driver_init(const struct device *dev)
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{
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const struct fake_driver_config *config = dev->config;
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struct fake_driver_data *data = dev->data;
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data->irq_callback = NULL;
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data->user_data = NULL;
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config->irq_config_func();
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return 0;
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}
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#define FAKE_INIT(inst) \
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static struct fake_driver_data fake_driver_data_##inst; \
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static void fake_driver_irq_config_func_##inst(void) \
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{ \
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IRQ_CONNECT(TEST_IRQ_NUM, TEST_IRQ_PRIO, fake_driver_isr, \
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DEVICE_DT_INST_GET(inst), 0); \
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irq_enable(TEST_IRQ_NUM); \
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} \
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static struct fake_driver_config fake_driver_config_##inst = { \
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.irq_config_func = fake_driver_irq_config_func_##inst, \
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.irq_num = TEST_IRQ_NUM, \
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.irq_priority = TEST_IRQ_PRIO, \
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}; \
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DEVICE_DT_INST_DEFINE(inst, &fake_driver_init, NULL, &fake_driver_data_##inst, \
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&fake_driver_config_##inst, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, &fake_driver_func);
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DT_INST_FOREACH_STATUS_OKAY(FAKE_INIT)

‎tests/application_development/ram_context_for_isr/src/main.c

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Test for driver relocation to RAM for ISRs
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*
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* This test demonstrates how to use the fake_driver and verify
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* that the callback are properly relocated to RAM.
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*/
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#if !defined(CONFIG_CPU_CORTEX_M)
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#error project can only run on Cortex-M for now
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#endif
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#include <zephyr/ztest.h>
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#include "fake_driver.h"
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static volatile bool test_flag;
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static void test_irq_callback(const struct device *dev, void *user_data)
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{
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uintptr_t func_addr = (uintptr_t)test_irq_callback;
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uintptr_t driver_isr_addr, arch_isr_wrapper_addr;
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test_flag = true;
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/* Retrieve the caller address (the arch specific isr wrapper since driver isr will be
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* optimized by the compiler)
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*/
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__asm__ volatile("mov %0, lr" : "=r"(arch_isr_wrapper_addr));
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/* retrieve the fake_driver_isr function address that was stored in user_data */
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driver_isr_addr = (uintptr_t)user_data;
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/* Check that the function and its call stack are in RAM */
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zassert_true(func_addr >= CONFIG_SRAM_BASE_ADDRESS &&
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func_addr <= CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE * 1024,
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"%s is not in RAM! Address: 0x%x", __func__, func_addr);
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zassert_true(driver_isr_addr >= CONFIG_SRAM_BASE_ADDRESS &&
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driver_isr_addr <= CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE * 1024,
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"fake_driver_isr is not in RAM! Address: 0x%x", driver_isr_addr);
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zassert_true(arch_isr_wrapper_addr >= CONFIG_SRAM_BASE_ADDRESS &&
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arch_isr_wrapper_addr <=
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CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE * 1024,
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"arch_isr_wrapper_addr is not in RAM! Address: 0x%x", arch_isr_wrapper_addr);
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TC_PRINT("Callback function address: 0x%lx\n", func_addr);
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TC_PRINT("Driver ISR address: 0x%lx\n", driver_isr_addr);
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TC_PRINT("Arch ISR wrapper address: 0x%lx\n", arch_isr_wrapper_addr);
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}
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ZTEST(ram_context_for_isr, test_fake_driver_in_ram)
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{
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const struct device *dev = DEVICE_DT_GET(DT_NODELABEL(fakedriver));
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const struct fake_driver_api *api = DEVICE_API_GET(fake, dev);
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uintptr_t dev_addr = (uintptr_t)dev;
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zassert_true(dev_addr >= CONFIG_SRAM_BASE_ADDRESS &&
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dev_addr <= CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE * 1024,
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"fake driver device is not in RAM! Address: 0x%x", dev_addr);
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TC_PRINT("Fake driver device address: 0x%lx\n", dev_addr);
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zassert_not_null(api, "Failed to get fake driver API");
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api->register_irq_callback(dev, test_irq_callback, NULL);
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test_flag = false;
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NVIC_SetPendingIRQ(27);
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k_busy_wait(1000);
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zassert_true(test_flag, "ISR callback was not called");
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}
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ZTEST_SUITE(ram_context_for_isr, NULL, NULL, NULL, NULL, NULL);

‎tests/application_development/ram_context_for_isr/testcase.yaml

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common:
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tags: linker
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tests:
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application_development.ram_context_for_isr.arm:
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arch_allow: arm
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filter: CONFIG_CPU_CORTEX_M_HAS_VTOR
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extra_configs:
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- CONFIG_CODE_DATA_RELOCATION_SRAM=y
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# In case you want to add this config, place all the possible called code in RAM
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- CONFIG_TRACING_ISR=n
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- CONFIG_STACK_SENTINEL=n
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- CONFIG_PM=n
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# Exclude mps3/corstone310 because it uses another mechanism to support relocation
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# of the vector table (CONFIG_ROMSTART_RELOCATION_ROM).
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platform_exclude:
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- mps3/corstone310/an555
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- mps3/corstone310/fvp
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- mps4/corstone315/fvp
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- mps4/corstone320/fvp

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