Imx93 sar adc #92882
Imx93 sar adc #92882
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area: Clock Control
platform: NXP MPU
area: ADC
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| ADC_Type *base; | ||
| void (*irq_config_func)(const struct device *dev); | ||
| const struct device *clock_dev; | ||
| clock_control_subsys_t clock_subsys; |
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Do we really need clock_dev and clock_subsys in the current driver?
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Do we really need
clock_devandclock_subsysin the current driver?
We didn't use clock_dev and clock_subsys now, but it is better to keep it.
drivers/adc/adc_mcux_sar_adc.c
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| ADC_ClearConvIntStatus(base, kADC_NormalConvChainEndIntFlag); | ||
| } | ||
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| if (((ADC_GetConvIntStatus(base) & kADC_NormalConvEndIntFlag))) { |
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This code can be removed? as we only enabled ECH interrupt?
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This two bits will be set by IP, it's better to clear them all. However, it's not a big problem.
dts/arm/nxp/nxp_imx93_m33.dtsi
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| interrupts = <219 0>; | ||
| status = "disabled"; | ||
| #io-channel-cells = <1>; | ||
| clocks = <&ccm IMX_CCM_LPUART2_CLK 0x0 0>; |
| &sar_adc1 { | ||
| status = "okay"; | ||
| }; | ||
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Update imx93_evk_mimx9352_m33.yaml to add adc in supported features?
drivers/adc/Kconfig.mcux
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| help | ||
| Amount of hardware command channels to use, reduce to save RAM. | ||
| The user can reduce this value if their application uses fewer than | ||
| 15 ADC channels. This value corresponds to how many of the CMD |
| # Copyright (c) 2025, NXP | ||
| # | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
| # |
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need to update testcase.yaml to use this conf file or move it to boards subdirectory and rename it to be platform name .conf
Add driver for the SAR ADC Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
Added SAR_ADC clock support for clock_control_mcux_ccm_rev2 Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
Add ADC node on imx93 core m33 Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
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Add necessary configuration for sar_adc1 on imx93 core cm33 There are some issues with USERSPACE, so add an overlay to disable CONFIG_TEST_USERSPACE, will drop it once it works. Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
enable CPU_CORTEX_M_HAS_DWT for imx93 core m33 Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
- Update imx93 headers and sar_adc driver Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
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Support adc on imx93 board