drivers: dma: sam: add support for sama7g5 DMA Controller (XDMAC) #92816
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Enable cache manamegent for sama7g5 series. Signed-off-by: Tony Han <tony.han@microchip.com>
When the XDMAC is activated in the DT, configure it's register region with strong ordered, read and write access. Signed-off-by: Tony Han <tony.han@microchip.com>
This update xdmac driver to support multiple DMA instancess. Signed-off-by: Tony Han <tony.han@microchip.com>
As the number of DMA channels could be different between DMA instances, get the number from "XDMAC Global Type Register" and validate the channel used. Signed-off-by: Tony Han <tony.han@microchip.com>
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Update the driver to support sama7g5 XDMAC peripheral. Signed-off-by: Tony Han <tony.han@microchip.com>
teburd
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Jul 8, 2025
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Please review the channel state machine diagram. It's one of the very few requirements I have for DMA drivers, to follow the expected results for applying channel changes.
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Add support for XDMA channel read write suspend and read write resume. Signed-off-by: Tony Han <tony.han@microchip.com>
Add dma nodes to sama7g5.dtsi and sama7g54_ek.dts files. Signed-off-by: Tony Han <tony.han@microchip.com>
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