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STM32L0: fix PLL input frequency division by HSI clock divider #92546

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STM32L0: fix PLL input frequency division by HSI clock divider #92546

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5a0898d
dts: bindings: clocks: Add clocks bindings for stm32l0 series
kbidani Jul 2, 2025
ba13cdb
drivers: clock_control: add HSI_DIV on STM32L0
kbidani Jul 2, 2025
e9b43b9
dts: arm: st: l0: update hsi clock node to use hsi divider
kbidani Jul 2, 2025
7285b1a
drivers: clock_control: fix PLL input frequency
kbidani Jul 2, 2025
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10 changes: 10 additions & 0 deletions drivers/clock_control/clock_stm32_ll_common.c
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Original file line number Diff line number Diff line change
Expand Up @@ -456,7 +456,11 @@ static int stm32_clock_control_get_subsys_rate(const struct device *clock,
#endif
#if defined(STM32_SRC_HSI)
case STM32_SRC_HSI:
#if defined(CONFIG_SOC_SERIES_STM32L0X)
*rate = STM32_HSI_FREQ / STM32_HSI_DIVISOR;
#else
*rate = STM32_HSI_FREQ;
#endif
break;
#endif
#if defined(STM32_SRC_MSI)
Expand Down Expand Up @@ -662,7 +666,13 @@ static void set_up_fixed_clock_sources(void)
}
}
#if STM32_HSI_DIV_ENABLED
#if defined(CONFIG_SOC_SERIES_STM32L0X)
if (STM32_HSI_DIVISOR == 4) {
LL_RCC_HSI_EnableDivider();
}
Comment on lines +670 to +672
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The disable function should also be called in an else. I think it is necessary if for example an MCUBoot enables the divider, but the application wants it disabled

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I agree, nice catch.

#else
LL_RCC_SetHSIDiv(hsi_divider(STM32_HSI_DIVISOR));
#endif
#endif
}

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4 changes: 4 additions & 0 deletions drivers/clock_control/clock_stm32l0_l1.c
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,11 @@ __unused
uint32_t get_pllsrc_frequency(void)
{
if (IS_ENABLED(STM32_PLL_SRC_HSI)) {
#if defined(CONFIG_SOC_SERIES_STM32L0X)
return STM32_HSI_FREQ / STM32_HSI_DIVISOR;
#else
return STM32_HSI_FREQ;
#endif
} else if (IS_ENABLED(STM32_PLL_SRC_HSE)) {
return STM32_HSE_FREQ;
}
Expand Down