disk: sdmmc: support L4 series with shared DMA channel #91491
+101
−11
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
github-actions
bot
requested review from
danieldegrasse,
decsny,
djiatsaf-st,
erwango,
etienne-lms,
FRASTM,
gautierg-st,
GeorgeCGV,
jfischer-no,
marwaiehm-st and
mathieuchopstm
JordanYates
force-pushed
the
250612_sdmmc_l4_dma
branch
2 times, most recently
from
24e216c to
7c577e5
Compare
|
Code has been tested on a custom STM32L451RE design, successfully writing, reading-back and erasing a random block, returning to low power idle when done. |
etienne-lms
reviewed
Jun 12, 2025
tests/drivers/disk/disk_access/boards/stm32l496g_disco_stm32l496xx.overlay
Outdated
Show resolved
Hide resolved
JordanYates
force-pushed
the
250612_sdmmc_l4_dma
branch
2 times, most recently
from
c2f92fe to
a0e4540
Compare
danieldegrasse
previously approved these changes
Jun 26, 2025
|
@etienne-lms can you revisit? |
etienne-lms
requested changes
Jun 27, 2025
| struct sdmmc_dma_stream *dma_tx = &priv->dma_tx; | ||
| struct sdmmc_dma_stream *dma_rx = &priv->dma_rx; | ||
|
|
||
| ret = dma_stop(dma_tx->dev, dma_tx->channel); | ||
| __ASSERT(ret == 0, "TX DMA channel index corrupted"); |
There was a problem hiding this comment.
Unless asserting the return value in debug build mode is always sufficient, i think it would be worth:
int ret = 0;
(...)
if (dma_stop(dma_tx->dev, dma_tx->channel) != 0) {
LOG_ERR("Failed to stop tx DMA transmission");
ret = -EIO;
}
HAL_DMA_DeInit(&priv->dma_tx_handle);
if (dma_stop(dma_xx->dev, dma_rx->channel) != 0) {
LOG_ERR("Failed to stop rx DMA transmission");
ret = -EIO;
}
HAL_DMA_DeInit(&priv->dma_rx_handle);
#endif
return ret;
} There was a problem hiding this comment.
It is an assertion because there is no code path that results in an error through that function unless RAM is corrupted.
if (id >= config->max_streams) {
return -EINVAL;
}
if (stream->hal_override) {
stream->busy = false;
return 0;
}
If ID is invalid in the normal case the setup functions will already error out with log messages.
If we're trying to protect against RAM corruption, there are many other problems...
Update the driver to support DMA operations on L4 series devices, with a shared DMA channel. Split channels do not work on these chips, since there is no dedicated TX and RX channels on the DMA, so configuring two channels with SDMMC as the peripheral results in a non-functional configuration. Fixes zephyrproject-rtos#91216. Signed-off-by: Jordan Yates <jordan@embeint.com>
Ensure that the shared DMA variant of the STM SDMMC driver is compiled in CI. Signed-off-by: Jordan Yates <jordan@embeint.com>
JordanYates
force-pushed
the
250612_sdmmc_l4_dma
branch
from
a0e4540 to
52f5de4
Compare
|
1 task
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Update the driver to support DMA operations on L4 series devices, with
a shared DMA channel. Split channels do not work on these chips, since
there is no dedicated TX and RX channels on the DMA, so configuring two
channels with SDMMC as the peripheral results in a non-functional
configuration.
Fixes #91216.