Skip to content

dts: xilinx: add cadence spi controllers to zynqmp.dtsi #90960

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: main
Choose a base branch
from
Open

dts: xilinx: add cadence spi controllers to zynqmp.dtsi #90960

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
27 changes: 26 additions & 1 deletion dts/arm/xilinx/zynqmp.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -304,6 +304,31 @@
IRQ_DEFAULT_PRIORITY>;
reg = <0xfd070000 0x30000>;
};
};

spi0: spi@ff040000 {
compatible = "cdns,spi";
reg = <0xff040000 0x1000>;
status = "disabled";
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
#address-cells = <1>;
#size-cells = <0>;
fifo-width = <8>;
rx-fifo-depth = <128>;
tx-fifo-depth = <128>;
};

spi1: spi@ff050000 {
compatible = "cdns,spi";
reg = <0xff050000 0x1000>;
status = "disabled";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
#address-cells = <1>;
#size-cells = <0>;
fifo-width = <8>;
rx-fifo-depth = <128>;
tx-fifo-depth = <128>;
};
};
};
Loading