soc: rp2350: Add basic Asymmetric Multiprocessing (AMP) support

boards/raspberrypi/common/rpi_pico-pinctrl-common.dtsi

@@ -15,6 +15,16 @@
 		};
 	};
 
+	uart1_default: uart1_default {
+		group1 {
+			pinmux = <UART1_TX_P4>;
+		};
+		group2 {
+			pinmux = <UART1_RX_P5>;
+			input-enable;
+		};
+	};
+
 	i2c0_default: i2c0_default {
 		group1 {
 			pinmux = <I2C0_SDA_P4>, <I2C0_SCL_P5>;

boards/raspberrypi/rpi_pico2/Kconfig.rpi_pico2

@@ -2,4 +2,5 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_RPI_PICO2
-	select SOC_RP2350A_M33 if BOARD_RPI_PICO2_RP2350A_M33
+	select SOC_RP2350A_M33_CPU0 if BOARD_RPI_PICO2_RP2350A_M33_CPU0
+	select SOC_RP2350A_M33_CPU1 if BOARD_RPI_PICO2_RP2350A_M33_CPU1

boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi

@@ -10,21 +10,17 @@
 #include <zephyr/dt-bindings/pwm/pwm.h>
 
 #include "rpi_pico2-pinctrl.dtsi"
-#include "../common/rpi_pico-led.dtsi"
 
-/ {
-	chosen {
-		zephyr,sram = &sram0;
-		zephyr,flash = &flash0;
-		zephyr,console = &uart0;
-		zephyr,shell-uart = &uart0;
-		zephyr,code-partition = &code_partition;
-	};
-
-	aliases {
-		watchdog0 = &wdt0;
-	};
+/*
+ * We need to be careful about shared definitions in this
+ * device tree. Zephyr will run start up code on peripherals
+ * that are present here - meaning it will get run twice.
+ * Best case, this is a bit wasteful as the bus accesses are
+ * arbitrated. Worst case, the peripherals are left in an
+ * unknown state based on the order of access.
+ */
 
+/ {
 	pico_header: connector {
 		compatible = "raspberrypi,pico-header";
 		#gpio-cells = <2>;
@@ -79,70 +75,45 @@
 
 		/*
 		 * Usable flash. Starts at 0x100, after the image definition block.
-		 * The partition size is 4MB minus the 0x100 bytes taken by the
+		 * The partition size is 2 MB minus the 0x100 bytes taken by the
 		 * image definition.
 		 */
-		code_partition: partition@100 {
-			label = "code-partition";
-			reg = <0x100 (DT_SIZE_M(4) - 0x100)>;
+		code_partition_cpu0: partition@100 {
+			label = "code-partition-cpu0";
+			reg = <0x100 (DT_SIZE_M(2) - 0x100)>;
 			read-only;
 		};
-	};
-};
 
-&uart0 {
-	current-speed = <115200>;
-	status = "okay";
-	pinctrl-0 = <&uart0_default>;
-	pinctrl-names = "default";
-};
-
-gpio0_lo: &gpio0 {
-	status = "okay";
-};
-
-&spi0 {
-	clock-frequency = <DT_FREQ_M(8)>;
-	pinctrl-0 = <&spi0_default>;
-	pinctrl-names = "default";
-};
-
-&i2c0 {
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-	pinctrl-0 = <&i2c0_default>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&i2c1 {
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-	pinctrl-0 = <&i2c1_default>;
-	pinctrl-names = "default";
-	status = "okay";
-};
-
-&adc {
-	pinctrl-0 = <&adc_default>;
-	pinctrl-names = "default";
-	status = "okay";
+		/*
+		 * Code for the second CPU uses the upper 2 MB of flash.
+		 */
+		code_partition_cpu1: partition@200000 {
+			label = "code-partition-cpu1";
+			reg = <0x200000 DT_SIZE_M(2)>;
+			read-only;
+		};
+	};
 };
 
-&pwm {
-	pinctrl-0 = <&pwm_ch4b_default>;
-	pinctrl-names = "default";
-	divider-int-0 = <255>;
-};
+/ {
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 
-&timer0 {
-	status = "okay";
-};
+		/* SRAM0-3 */
+		sram0_cpu0: cpu0@20000000 {
+			reg = <0x20000000 DT_SIZE_K(256)>;
+		};
 
-&wdt0 {
-	status = "okay";
-};
+		/* SRAM4-7 */
+		sram0_cpu1: cpu1@20040000 {
+			reg = <0x20040000 DT_SIZE_K(256)>;
+		};
 
-zephyr_udc0: &usbd {
-	status = "okay";
+		/* SRAM8-9 */
+		sram0_shared: shared@20080000 {
+			reg = <0x20080000 DT_SIZE_K(8)>;
+		};
+	};
 };
-
-pico_serial: &uart0 {};

boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_cpu0.dts

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2024 Andrew Featherstone
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+/* The build system assumes that there's a cpucluster-specific file.
+ *
+ * This file provides composition of the device tree:
+ * 1. The common features of the SoC
+ * 2. Core-specific configuration.
+ * 3. Board-specific configuration.
+ */
+#include <raspberrypi/rpi_pico/rp2350a.dtsi>
+#include <raspberrypi/rpi_pico/m33.dtsi>
+
+#include "rpi_pico2.dtsi"
+#include "../common/rpi_pico-led.dtsi"
+
+/ {
+	chosen {
+		zephyr,sram = &sram0_cpu0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,code-partition = &code_partition_cpu0;
+	};
+
+	aliases {
+		watchdog0 = &wdt0;
+	};
+};
+
+&uart0 {
+	current-speed = <115200>;
+	status = "okay";
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
+};
+
+gpio0_lo: &gpio0 {
+	status = "okay";
+};
+
+&spi0 {
+	clock-frequency = <DT_FREQ_M(8)>;
+	pinctrl-0 = <&spi0_default>;
+	pinctrl-names = "default";
+};
+
+&i2c0 {
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&i2c1 {
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c1_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&adc {
+	pinctrl-0 = <&adc_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&pwm {
+	pinctrl-0 = <&pwm_ch4b_default>;
+	pinctrl-names = "default";
+	divider-int-0 = <255>;
+};
+
+&timer0 {
+	status = "okay";
+};
+
+&wdt0 {
+	status = "okay";
+};
+
+zephyr_udc0: &usbd {
+	status = "okay";
+};
+
+pico_serial: &uart0 {};

boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.yaml → boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_cpu0.yaml

@@ -1,9 +1,9 @@
-identifier: rpi_pico2/rp2350a/m33
-name: Raspberry Pi Pico 2 (Cortex-M33)
+identifier: rpi_pico2/rp2350a/m33_cpu0
+name: Raspberry Pi Pico 2 (Cortex-M33 CPU0)
 type: mcu
 arch: arm
 flash: 4096
-ram: 520
+ram: 264
 toolchain:
   - zephyr
   - gnuarmemb

boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.dts → boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_cpu1.dts

@@ -16,7 +16,21 @@
 #include <raspberrypi/rpi_pico/rp2350a.dtsi>
 #include <raspberrypi/rpi_pico/m33.dtsi>
 
-/* there's nothing specific to the Cortex-M33 cores vs the (not yet
- * implemented) Hazard3 cores.
- */
 #include "rpi_pico2.dtsi"
+
+/ {
+	chosen {
+		zephyr,sram = &sram0_cpu1;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,code-partition = &code_partition_cpu1;
+	};
+};
+
+&uart1 {
+	current-speed = <115200>;
+	status = "okay";
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};

boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_cpu1.yaml

@@ -0,0 +1,20 @@
+identifier: rpi_pico2/rp2350a/m33_cpu1
+name: Raspberry Pi Pico 2 (Cortex-M33 CPU1)
+type: mcu
+arch: arm
+flash: 4096
+ram: 264
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - adc
+  - clock
+  - counter
+  - dma
+  - gpio
+  - hwinfo
+  - i2c
+  - pwm
+  - spi
+  - uart

boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_cpu1_defconfig

@@ -0,0 +1,14 @@
+# This configuration is orthogonal to whether the Cortex-M33 or Hazard3 cores
+# are in use, but Zephyr does not support providing a qualifier-agnostic
+# _defconfig file.
+CONFIG_BUILD_OUTPUT_HEX=y
+CONFIG_BUILD_OUTPUT_UF2=y
+CONFIG_CLOCK_CONTROL=y
+CONFIG_CONSOLE=y
+CONFIG_GPIO=y
+CONFIG_RESET=y
+CONFIG_SERIAL=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=150000000
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_USE_DT_CODE_PARTITION=y

drivers/clock_control/Kconfig.rpi_pico

@@ -17,4 +17,10 @@ config RPI_PICO_ROSC_USE_MEASURED_FREQ
 	 Instead of the dts value, use the value measured by
 	 the frequency counter as the rosc frequency.
 
+config RPI_PICO_SKIP_CLOCK_INIT
+	bool
+	help
+	 Skip clock initialisation - which is needed when running Zephyr
+	 on the second CPU core.
+
 endif # CLOCK_CONTROL_RPI_PICO