Skip to content

Add support for WCH CH32L103 #89451

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 3 commits into from
Closed

Add support for WCH CH32L103 #89451

Changes from 1 commit
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
f8a4e2d
drivers: clock_control: Add fix to wch clock control for ch32l103
paulwedeck May 4, 2025
855059c
soc: Introduce WCH CH32L103 SoC
paulwedeck May 4, 2025
eeb0341
boards: add ch32l103evt board
paulwedeck May 4, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
10 changes: 10 additions & 0 deletions drivers/clock_control/clock_control_wch_rcc.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,16 @@ static int clock_control_wch_rcc_init(const struct device *dev)
}
}

#if defined(CONFIG_SOC_CH32L103)
if(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC > 72*1000*1000) {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

optional: I have something similar in 51cc459

If you want, please pull the change in and make this match the same style.

I'm not worried if you don't as I can fix it when I send my PR out for review.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I would like to but the l103 is not yet supported by ch32fun.
I just use the headers for the v208 which does not include the necessary defines (probably because it doesn't apply to the v208).

FLASH->ACTLR = 2;
} else if(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC > 40*1000*1000) {
FLASH->ACTLR = 1;
} else {
FLASH->ACTLR = 0;
}
#endif

if (IS_ENABLED(WCH_RCC_SRC_IS_HSI)) {
RCC->CFGR0 = (RCC->CFGR0 & ~RCC_SW) | RCC_SW_HSI;
} else if (IS_ENABLED(WCH_RCC_SRC_IS_HSE)) {
Expand Down