Flexio SPI loopback test failed on fast speed(16Mbps)

[Raymond0225]

drivers: spi: nxp: flexiospi spi_loopback test failed on flexio spi

Several reason cause loopback test failed:
a) FlexIO input frequency is not correct, on RT11xx, input freq is 24M,
while max bandrate can reach 1/4 of input freq, so it can only support
6Mbps.
b) Flexio shift register depend on correct timer output to triggger TX
and TX, if timer comparison value is not accurate, RX error happens on
high band rate. This is the reason why test fails on RT1060.

also fix a error on FlexIO clock ID calculation.

test: drivers: spi_loopback: Flexio spi support for RT1060 EVKC and RT1170 EVK

Add overlay file for RT1170 EVK and simply existing flexio spi overlay
file for RT1060 and RT1064 EVK. One flexio-spi interface for both slow
and fast tests. Fast bandrate set to 16Mbps now.

fix this issue: #77992

[asingh-GiN]

Hello @Raymond0225,

I tested the changes you proposed on my target device, and they seem to be working for me now. 😊

That said, I wanted to highlight a performance concern. It appears the issue stems from the busy wait condition inside the ISR. As seen in this line, there's a 100-microsecond wait, which seems to negatively impact performance.

When I reduced the delay to just 1 or 2 cycles, I noticed a significant performance improvement. It might be worth considering removing or minimizing such waits in the ISR to keep its execution time as short as possible.

@mmahadevan108, what are your thoughts on this?
This could also fix the other issue I posted. :)

[Raymond0225]

Hello @Raymond0225,

I tested the changes you proposed on my target device, and they seem to be working for me now. 😊

That said, I wanted to highlight a performance concern. It appears the issue stems from the busy wait condition inside the ISR. As seen in this line, there's a 100-microsecond wait, which seems to negatively impact performance.

When I reduced the delay to just 1 or 2 cycles, I noticed a significant performance improvement. It might be worth considering removing or minimizing such waits in the ISR to keep its execution time as short as possible.

@mmahadevan108, what are your thoughts on this? This could also fix the other issue I posted. :)

thanks @asingh-GiN for your feedback.
you are right, in this wait, we should not use a fix delay time. I think we need calculate a delay based on band rate.

[Raymond0225]

Did a lot of tests just now, I am sure we can remove that delay completely. But so far, we can't, if we remove that delay, loop_spi test fails. There are bugs and I will submit another PR to address this issue and fix it.
Even we removed this delay, the efficiency is not so good, you can see a 4xx ns delay on the end of each frame (1 byte), it means although band rate is 16Mbps, the real speed may be about 8Mbps. This limitation is due to the nature of FLEXIO itself.

[asingh-GiN]

@Raymond0225 Thanks for checking it out as well. :)
Please tag me or the other issue, in the new PR so that I am also in the loop.
According to a discussion I had with the NXP support team, they said that the maximum recommended clock freq for FLEXIO SPI is 20MHz. I believe the issue might be where the flags are handled if thats the case.

addressed.

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

[JarmouniA]

baud rate to be corrected in commits messages.