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boards: tcc: topst_vcp45: add Telechips' TOPST-VCP45 board and basic device driver #83136

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@pooky1004 pooky1004 commented Dec 18, 2024

  • Add vendor-prefix tcc for vendor TELECHIPS INC.
  • Add support for TCC7045, SoC of TOPST VCP45.
  • Add device-tree files
  • Add support for TOPST VCP45 board
  • Add GPIO driver for tccvcp
  • Add clock-control driver
  • Add interrupt-controller driver
  • Add timer driver
  • Add serial driver
  • Add console driver
  • Add trigger_irq for topst_vcp45

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Hello @pooky1004, and thank you very much for your first pull request to the Zephyr project!
Our Continuous Integration pipeline will execute a series of checks on your Pull Request commit messages and code, and you are expected to address any failures by updating the PR. Please take a look at our commit message guidelines to find out how to format your commit messages, and at our contribution workflow to understand how to update your Pull Request. If you haven't already, please make sure to review the project's Contributor Expectations and update (by amending and force-pushing the commits) your pull request if necessary.
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@pooky1004 pooky1004 changed the title Add the Topst vcp45 board and its related basic device drivers [TOPST-VCP45] Telechips' TOPST-VCP45 board added and basic device driver added Dec 18, 2024
@pooky1004 pooky1004 changed the title [TOPST-VCP45] Telechips' TOPST-VCP45 board added and basic device driver added boards: tcc: topst_vcp45: add Telechips' TOPST-VCP45 board and basic device driver Dec 18, 2024
decsny
decsny previously approved these changes Dec 18, 2024
@decsny decsny requested review from nordicjm and kartben December 18, 2024 01:57
Comment on lines 11 to 12
The Telechips Interrupt Controller provides hardware assistance for prioritizing
and aggregating the interrupt sources for ARM Cortex-R5 processor cores.
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help text indent it 1x tab followed by 2x spaces

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fix help text indentation in drivers/interrupt controller/Kconfig.tic file, replace 2x tabs with 1x tab followed by 2x spaces.


void vcp_clock_init(void);

long clock_set_pll_rate(signed long id, uint32_t rate);
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@stephanosio do we allow long types instead of int?

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change signed long and long to int32_t, unsigned long long to uint64_t, and boolean to bool.


long clock_set_pll_rate(signed long id, uint32_t rate);

uint32_t clock_get_pll_rate(signed long id);
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None of these are documented, doesn't look to be using the zephyr driver class properly @nordic-krch is this acceptable?

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include/zephyr/drivers/clock_control contains vendor specific extensions to clock related features so that is ok but definitely it is missing doxygen documentation.

Comment on lines 11 to 13
/*
* DEFINITIONS
*
*/
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Suggested change
/*
* DEFINITIONS
*
*/

Comment on lines 18 to 13
/*
* FUNCTION PROTOTYPES
*
*/
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Suggested change
/*
* FUNCTION PROTOTYPES
*
*/

thee headers can go


CONFIG_SYSCON=y

CONFIG_TIMEOUT_64BIT=y
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soc?

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move some configs from boards/tcc/topst_vcp45/topst_vcp45_defconfig to SOC config

# Copyright 2024 Hounjoung Rim <hounjoung@tsnlab.com>

CONFIG_XIP=n
CONFIG_SRAM_VECTOR_TABLE=y
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soc?

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move some configs from boards/tcc/topst_vcp45/topst_vcp45_defconfig to SOC config

Comment on lines 7 to 6
CONFIG_MAX_THREAD_BYTES=3
CONFIG_THREAD_STACK_INFO=y

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Suggested change
CONFIG_MAX_THREAD_BYTES=3
CONFIG_THREAD_STACK_INFO=y

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change the value of CONFIG_MAX_THREAD_BYTES defined in the boards/tcc/topst_vcp45/topst_vcp45_defconfig file from 3 to 13.

/*
* Copyright 2024 Hounjoung Rim <hounjoung@tsnlab.com>
*
* SPDX-License-Identifier: Apache-2.0
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why is this needed and why can't one of the cortex_* ones in tree be used?

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Additional settings are needed for REMAP, so I use our own linker.ld file.

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Sometimes SoC's needs there own linker.ld file for various reason, and the maintainer or contributor of this should be ready to update when there are changes.

Though if the sole reason in this case is for a REMAP memory section, then I would like to know why this memory region is not defined in devicetree and thereby become available through the use of LINKER_DT_REGIONS(), which also exists in the cortex default linker templates.

Based on this observation, then I also doubt this SoC works with the CMake linker generator.
A basic test of this would simply be to do a build using -DCONFIG_CMAKE_LINKER_GENERATOR=y.
(Haven't tested this PR yet)

Comment on lines 124 to 127
unsigned long long rem = 0;
unsigned long long b = divisor;
unsigned long long d = 1;
unsigned long long res = 0;
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why can't uint64 be used?

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change signed long and long to int32_t, unsigned long long to uint64_t, and boolean to bool.


int32_t soc_div64_to_32(unsigned long long *pullDividend, uint32_t uiDivisor, uint32_t *puiRem);

typedef unsigned char boolean; /* for use with TRUE/FALSE */
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no

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change signed long and long to int32_t, unsigned long long to uint64_t, and boolean to bool.

Comment on lines 11 to 30
#ifndef FALSE
#define FALSE (0U)
#endif

#ifndef TRUE
#define TRUE (1U)
#endif

#ifndef NULL_PTR
#define NULL_PTR ((void *)0)
#endif

#ifndef NULL
#define NULL (0)
#endif

#ifndef ON
#define ON (TRUE)
#define OFF (FALSE)
#endif
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no

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I'm glad I didn't arrive too late. As for the preprocessing macros, we should align with Zephyr. Regarding the other header files, I think they also need to be updated, but I won't point them out here.

rruuaanng
rruuaanng previously approved these changes Dec 22, 2024
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We should now address the other maintainers' comments and get the CI back to normal.
(Maybe I missed some parts, but I need to leave it to others.)

* DEFINITIONS
*/

#define CKC_MHZ(x) (uint32_t)((x) * 1000000)
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@rruuaanng rruuaanng Dec 22, 2024

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Please remove it, we have DT_FREQ_M.
(or you can define an alias for it. It can be called CKC_MHZ.)

Edit

This is just a suggestion, DT_FREQ_M is recommended to be used in dts, but I just want to remind you.

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delete the unused CKC_MHZ(x) macro defined in the include/zephyr/drivers/clock_control/clock_control_tcc_ccu.h file.

@pooky1004 pooky1004 force-pushed the topst_vcp45 branch 3 times, most recently from e4be27c to c48382e Compare April 29, 2025 05:52
@pooky1004 pooky1004 force-pushed the topst_vcp45 branch 2 times, most recently from 9dbe09a to d47f46f Compare May 21, 2025 07:19
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Quality Gate Failed Quality Gate failed

Failed conditions
D Reliability Rating on New Code (required ≥ C)

See analysis details on SonarQube Cloud

Catch issues before they fail your Quality Gate with our IDE extension SonarQube for IDE

@pooky1004 pooky1004 force-pushed the topst_vcp45 branch 5 times, most recently from 6f31d8c to 10c6b0e Compare July 10, 2025 12:37
Add vendor-prefix tcc for vendor TELECHIPS INC., required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
@pooky1004 pooky1004 force-pushed the topst_vcp45 branch 2 times, most recently from 7229d55 to de156d0 Compare July 21, 2025 23:30
pooky1004 added 10 commits July 23, 2025 16:30
Add support for TCC7045, SoC of TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add device-tree files, required by TOPST VCP45.
The device tree defines hardware details such as the CPU, timers,
interrupt controller, flash memory, RAM, clock controller, UART,
and GPIOs, providing a clear map of the system's architecture.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add support for TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add GPIO driver for tccvcp, required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add interrupt-controller driver for tic, required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add timer driver for tcc_vcpttc, required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add clock-control driver for tccvcp, required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add serial driver for tccvcp, required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
Add console driver for tccvcp, required by TOPST VCP45.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
add trigger_irq for topst vcp45 to
subsys/test/suite/include/zephyr/interrupt util.h file.

Signed-off-by: Hounjoung Rim <hounjoung@tsnlab.com>
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#include <zephyr/dt-bindings/interrupt-controller/tcc-tic.h>
#include <zephyr/sys/util_macro.h>

typedef struct tic_distributor {
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@stephanosio stephanosio Jul 23, 2025

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This looks awful lot like ARM GICv1, if not identical ... Any reason this cannot use the existing GIC driver?

I mean it probably is GICv1, given that the SoC is Cortex-R5.

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9 participants