Skip to content

Actions: sysprog21/vga-nyancat

Actions

CI Verification

Actions

Loading...
Loading

Show workflow options

Create status badge

Loading
main.yml
18 workflow runs
18 workflow runs

Filter by Event

Filter by Status

Filter by Branch

Filter by Actor

Merge pull request #8 from sysprog21/cleanup CI Verification #21: Commit b04d8c8 pushed by jserv
3m 6s main
main
3m 6s
Remove unused code CI Verification #20: Pull request #8 opened by jserv
1m 51s cleanup
cleanup
1m 51s
Simplify simulation binary naming CI Verification #19: Commit 0c99456 pushed by jserv
2m 36s main
main
2m 36s
Merge pull request #7 from sysprog21/render-profiler CI Verification #18: Commit 984df63 pushed by jserv
2m 50s main
main
2m 50s
Add RenderProfiler for performance analysis CI Verification #17: Pull request #7 opened by jserv
1m 4s render-profiler
render-profiler
1m 4s
Merge pull request #6 from sysprog21/change-tracking CI Verification #16: Commit b29797b pushed by jserv
2m 20s main
main
2m 20s
Add tile-based and heat map tracking CI Verification #15: Pull request #6 opened by jserv
2m 36s change-tracking
change-tracking
2m 36s
Merge pull request #5 from sysprog21/scaling CI Verification #14: Commit fa5c177 pushed by jserv
2m 20s main
main
2m 20s
Add auto-scaling support for multiple video modes CI Verification #13: Pull request #5 opened by jserv
2m 28s scaling
scaling
2m 28s
Merge pull request #4 from sysprog21/coordinate-validation CI Verification #12: Commit 8b8a688 pushed by jserv
3m 17s main
main
3m 17s
Add defense-in-depth coordinate validation CI Verification #11: Pull request #4 opened by jserv
2m 32s coordinate-validation
coordinate-validation
2m 32s
Merge pull request #3 from sysprog21/sync-signal-state CI Verification #10: Commit 9436223 pushed by jserv
2m 56s main
main
2m 56s
Add sync signal validation CI Verification #9: Pull request #3 opened by jserv
2m 55s sync-signal-state
sync-signal-state
2m 55s
Merge pull request #2 from sysprog21/assertions CI Verification #8: Commit bfe436c pushed by jserv
2m 52s main
main
2m 52s
Improve Verilator assertions CI Verification #7: Pull request #2 opened by jserv
2m 18s assertions
assertions
2m 18s
Add VGA timing validation CI Verification #6: Commit d017b40 pushed by jserv
2m 33s main
main
2m 33s
Merge pull request #1 from sysprog21/ci-enable CI Verification #5: Commit c712764 pushed by jserv
1m 13s main
main
1m 13s
Add GitHub Actions for automated verification CI Verification #4: Pull request #1 synchronize by jserv
1m 14s ci-enable
ci-enable
1m 14s