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Timmmm opened this issue Oct 7, 2024 · 1 comment · May be fixed by #889
Open

Update Linux images #580

Timmmm opened this issue Oct 7, 2024 · 1 comment · May be fixed by #889

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@Timmmm
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Timmmm commented Oct 7, 2024

The Linux images in os-boot a) are very out of date, awkward to use because they require patching the model, and don't really belong there anyway.

We should

  1. Create up-to-date images and put them in another repo, probably with the ELF's attached to Github releases.
  2. Remove the images from os-boot, and replace them with instructions (or maybe a script) to use the ELFs from the other repo.

It would be really great if the images could run on all of the major emulators:

  1. Sail
  2. Spike
  3. QEMU
  4. Whisper
  5. Imperas

(I think that's it?)
@Timmmm
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Timmmm commented Oct 7, 2024

I have got Sail and Spike working, and Imperas partly working with a newer Linux (with no userspace admittedly but I don't know if that really matters). The hard bit is getting console output working on all the emulators, and how to supply the DTB.

  1. Sail and Spike support HTIF for console output. OpenSBI supports this and can expose this to Linux, so they're pretty easy. Both support supplying a DTB on the command line.
  2. Imperas doesn't support HTIF or supplying DTBs on the command line. OpenSBI can embed the DTB but I'm not sure how to get console output yet.
  3. For some reason my Linux image doesn't boot with the default Sail memory limit. Changing it to match Spike makes it work. Probably a good idea anyway.

I haven't tried QEMU or Whisper yet.

@jordancarlin jordancarlin mentioned this issue Apr 11, 2025
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@Arielfoever Arielfoever mentioned this issue Apr 25, 2025
Open
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 26, 2025
@Arielfoever @Timmmm
Move to new os-boot.
7adbefa 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Co-authored-by: Tim Hutt <tdhutt@gmail.com>
@Arielfoever Arielfoever linked a pull request Apr 26, 2025 that will close this issue
Open
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 26, 2025
@Arielfoever @Timmmm
Move to new os-boot.
560fc8b 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Co-authored-by: Tim Hutt <tdhutt@gmail.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 26, 2025
@Arielfoever @Timmmm
Move to new os-boot.
3f12183 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Co-authored-by: Tim Hutt <tdhutt@gmail.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 27, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
9ae338f 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 27, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
5e26b6e 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
d65c251 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
72eb8ee 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
d66a750 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
59a98ba 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
66d00d5 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
21747c2 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
3dbf9f9 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
6b05e25 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 29, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
3087755 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Arielfoever added a commit to Arielfoever/sail-riscv that referenced this issue Apr 30, 2025
@Arielfoever
Move to new os-boot with Makefile and CI.
1c4022d 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
Timmmm pushed a commit to Arielfoever/sail-riscv that referenced this issue May 1, 2025
@Arielfoever @Timmmm
Move to new os-boot with Makefile and CI.
dc4cdcc 
  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
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Move to new os-boot. Arielfoever/sail-riscv
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@Timmmm