Move to new os-boot with Makefile and CI.

  Fix riscv#580

Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>

Author: Arielfoever

.github/workflows/os-boot.yml

@@ -0,0 +1,68 @@
+name: Build os-boot
+permissions:
+  id-token: write
+  attestations: write
+  contents: read
+
+on:
+  push:
+    paths:
+      - ".github/workflows/os-boot.yml"
+  pull_request:
+    paths:
+      - ".github/workflows/os-boot.yml"
+  workflow_dispatch:
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Install packages
+        run: sudo apt install -y build-essential curl
+
+      - name: Check out repository code
+        uses: actions/checkout@v4
+
+      - name: Make ELF
+        working-directory: os-boot
+        run: make
+
+      - name: Generate SBOM
+        working-directory: os-boot
+        run: shasum -a 256 build/*.tar.xz > SBOM.sha256
+
+      - name: Upload ELF
+        uses: actions/upload-artifact@v4
+        id: upload
+        with:
+          name: os-boot-${{ github.run_id }}
+          path: os-boot/build/fw_payload.elf
+
+      - name: Generate artifact attestation
+        if: github.event_name != 'pull_request'
+        uses: actions/attest-build-provenance@v2
+        id: attest
+        with:
+          subject-path: os-boot/build/fw_payload.elf
+          show-summary: false
+
+      - name: Upload Paper Work
+        working-directory: os-boot
+        env:
+          ELFURL: ${{ steps.upload.outputs.artifact-url }}
+          ATTESTURL: ${{ steps.attest.outputs.attestation-url }}
+        run: |
+          echo "# os-boot ELF" >> $GITHUB_STEP_SUMMARY
+          echo "" >> $GITHUB_STEP_SUMMARY
+          echo "The generated [ELF file]("$ELFURL") can be verified from [here]("$ATTESTURL")." >> $GITHUB_STEP_SUMMARY
+          echo "" >> $GITHUB_STEP_SUMMARY
+          echo "## Header" >> $GITHUB_STEP_SUMMARY
+          echo "" >> $GITHUB_STEP_SUMMARY
+          echo "\`\`\`" >> $GITHUB_STEP_SUMMARY
+          readelf -h build/fw_payload.elf >> $GITHUB_STEP_SUMMARY
+          echo "\`\`\`" >> $GITHUB_STEP_SUMMARY
+          echo "" >> $GITHUB_STEP_SUMMARY
+          echo "## SBOM" >> $GITHUB_STEP_SUMMARY
+          echo "\`\`\`" >> $GITHUB_STEP_SUMMARY
+          cat SBOM.sha256 >> $GITHUB_STEP_SUMMARY
+          echo "\`\`\`" >> $GITHUB_STEP_SUMMARY

os-boot/Makefile

@@ -0,0 +1,67 @@
+.PHONY: download_gcc download_linux download_opensbi linux opensbi clean all
+
+all: clean download_gcc download_linux download_opensbi linux opensbi
+
+RISCV_COMPILER_URL ?= https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2025.01.20/riscv64-glibc-ubuntu-24.04-gcc-nightly-2025.01.20-nightly.tar.xz
+LINUX_VERSION ?= 6.14.4
+OPENSBI_VERSION ?= 1.6
+
+download_gcc:
+	mkdir -p build
+ifeq (, $(wildcard build/gcc.tar.xz))
+	curl -L $(RISCV_COMPILER_URL) -o build/gcc.tar.xz
+endif
+	curl -L $(RISCV_COMPILER_URL) -o build/gcc.tar.xz
+	tar -C build -xf build/gcc.tar.xz
+
+download_linux:
+	mkdir -p build
+ifeq (, $(wildcard build/linux.tar.xz))
+	curl -L https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-$(LINUX_VERSION).tar.xz -o build/linux.tar.xz
+endif
+	tar -C build -xf build/linux.tar.xz
+
+download_opensbi:
+	mkdir -p build
+ifeq (, $(wildcard build/opensbi.tar.xz))
+	curl -L https://github.com/riscv-software-src/opensbi/archive/refs/tags/v$(OPENSBI_VERSION).tar.gz -o build/opensbi.tar.xz
+endif
+	tar -C build -xf build/opensbi.tar.xz
+
+CROSS_COMPILE := $(shell pwd)/build/riscv/bin/riscv64-unknown-linux-gnu-
+
+elf := build/opensbi-$(OPENSBI_VERSION)/build/platform/generic/firmware/fw_payload.elf
+
+# Number of instructions to run.
+LIMIT_INSTRUCTIONS ?= 250000
+
+linux:
+	$(MAKE) -C build/linux-$(LINUX_VERSION) CROSS_COMPILE=$(CROSS_COMPILE) ARCH=riscv -j$(shell nproc) defconfig
+	$(MAKE) -C build/linux-$(LINUX_VERSION) CROSS_COMPILE=$(CROSS_COMPILE) CONFIG_HVC_RISCV_SBI=y ARCH=riscv -j$(shell nproc) Image vmlinux
+
+# FW_TEXT_START is 0 by default which doesn't leave space for the emulator bootloader.
+# 0x80000000 is the default start of Spike's memory.
+opensbi:
+	$(MAKE) -C build/opensbi-$(OPENSBI_VERSION) FW_TEXT_START=0x80000000 FW_PAYLOAD=y FW_PAYLOAD_PATH=../linux-$(LINUX_VERSION)/arch/riscv/boot/Image PLATFORM=generic CROSS_COMPILE=$(CROSS_COMPILE) -j$(shell nproc)
+	cp build/opensbi-$(OPENSBI_VERSION)/build/platform/generic/firmware/fw_payload.elf build/fw_payload.elf
+
+sail.dtb: sail.dts
+	dtc < sail.dts -o sail.dtb
+
+# Run on Spike.
+spike:
+	spike --instructions=$(LIMIT_INSTRUCTIONS) $(elf)
+
+# Path to Sail emulator.
+SAIL := riscv_sim_rv64d
+
+# Run on Sail.
+sail: sail.dtb
+	../build/c_emulator/riscv_sim_rv64d --no-trace -p -l $(LIMIT_INSTRUCTIONS) --device-tree-blob sail.dtb -t /tmp/console.log build/opensbi-$(OPENSBI_VERSION)/build/platform/generic/firmware/fw_payload.elf
+
+# QEMU attempt. Not sure I ever got this working.
+qemu:
+	qemu-system-riscv64 -M virt -m 256M -nographic -bios $(elf)
+
+clean:
+	rm -rf build

os-boot/README.md

@@ -9,50 +9,107 @@ interrupt controller). Console input is not currently supported.
 32-bit OS boots require a workaround for the 64-bit HTIF interface,
 which is currently not supported.
 
-OS boots use device-tree binary blobs generated by the `dtc` compiler,
-installable on Ubuntu and Debian machines with
+## Build your own ELF
 
-```
-sudo apt install device-tree-compiler
+```bash
+make -C os-boot
 ```
 
-## Booting Linux with the C backend
+This will generate `os-boot/build/platform/generic/firmware/fw_payload.elf`.
 
-The C model needs an ELF-version of the BBL (Berkeley-Boot-Loader)
-that contains the Linux kernel as an embedded payload. It also needs
-a DTB (device-tree blob) file describing the platform (say in the file
-`spike.dtb`). Once those are available (see below for suggestions),
-the model should be run as:
+### Boot ELF
 
-```
-$ ./c_emulator/riscv_sim_<arch> -t console.log -b spike.dtb bbl > execution-trace.log 2>&1 &
-$ tail -f console.log
+```bash
+make sail
 ```
 
-The `console.log` file contains the console boot messages. For maximum
-performance and benchmarking a model without any execution tracing is
-available on the optimize branch (`git checkout optimize`) of this
-repository. This currently requires the latest Sail built from source.
+Use `tail -f /tmp/console.log` to see the terminal log.
 
-## Caveats for OS boot
+### Results
 
-- Some OS toolchains generate obsolete LR/SC instructions with now
-  illegal combinations of `.aq` and `.rl` flags. You can work-around
-  this by changing `riscv_mem.sail` to accept these flags.
+```log
+[ariel@archlinux sail-riscv]$ cat /tmp/console.log
 
-- One needs to manually ensure that the DTB used for the C model
-  accurately describes the physical memory map implemented in the C
-  platform. This will not be needed once the C model can generate its
-  own DTB.
+OpenSBI v1.6
+   ____                    _____ ____ _____
+  / __ \                  / ____|  _ \_   _|
+ | |  | |_ __   ___ _ __ | (___ | |_) || |
+ | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
+ | |__| | |_) |  __/ | | |____) | |_) || |_
+  \____/| .__/ \___|_| |_|_____/|____/_____|
+        | |
+        |_|
 
-## Sample Linux image
+Platform Name               : ucbbar,spike-bare
+Platform Features           : medeleg
+Platform HART Count         : 1
+Platform IPI Device         : aclint-mswi
+Platform Timer Device       : aclint-mtimer @ 10000000Hz
+Platform Console Device     : htif
+Platform HSM Device         : ---
+Platform PMU Device         : ---
+Platform Reboot Device      : htif
+Platform Shutdown Device    : htif
+Platform Suspend Device     : ---
+Platform CPPC Device        : ---
+Firmware Base               : 0x80000000
+Firmware Size               : 317 KB
+Firmware RW Offset          : 0x40000
+Firmware RW Size            : 61 KB
+Firmware Heap Offset        : 0x46000
+Firmware Heap Size          : 37 KB (total), 2 KB (reserved), 11 KB (used), 23 KB (free)
+Firmware Scratch Size       : 4096 B (total), 392 B (used), 3704 B (free)
+Runtime SBI Version         : 2.0
+Standard SBI Extensions     : time,rfnc,ipi,base,hsm,srst,pmu,dbcn,legacy
+Experimental SBI Extensions : fwft,sse
 
-`rv64-linux-4.15.0-gcc-7.2.0-64mb.bbl` contains a sample Linux RV64
-image that can be booted as follows, after first generating the
-device-tree blob for a 64MB RV64 machine using `dtc`:
+Domain0 Name                : root
+Domain0 Boot HART           : 0
+Domain0 HARTs               : 0*
+Domain0 Region00            : 0x0000000000000000-0x0000000000000fff M: (I,R,W) S/U: (R,W)
+Domain0 Region01            : 0x0000000080040000-0x000000008004ffff M: (R,W) S/U: ()
+Domain0 Region02            : 0x0000000002080000-0x00000000020bffff M: (I,R,W) S/U: ()
+Domain0 Region03            : 0x0000000080000000-0x000000008003ffff M: (R,X) S/U: ()
+Domain0 Region04            : 0x0000000002000000-0x000000000207ffff M: (I,R,W) S/U: ()
+Domain0 Region05            : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
+Domain0 Next Address        : 0x0000000080200000
+Domain0 Next Arg1           : 0x0000000082200000
+Domain0 Next Mode           : S-mode
+Domain0 SysReset            : yes
+Domain0 SysSuspend          : yes
 
-```
-dtc < os-boot/rv64-64mb.dts > os-boot/rv64-64mb.dtb
-./c_emulator/riscv_sim_RV64 -b os-boot/rv64-64mb.dtb -t /tmp/console.log os-boot/rv64-linux-4.15.0-gcc-7.2.0-64mb.bbl > >(gzip -c > execution-trace.log.gz) 2>&1
-tail -f /tmp/console.log
+Boot HART ID                : 0
+Boot HART Domain            : root
+Boot HART Priv Version      : v1.12
+Boot HART Base ISA          : rv64imafdcbv
+Boot HART ISA Extensions    : sscofpmf,zicntr,zihpm,smcntrpmf,sdtrig
+Boot HART PMP Count         : 16
+Boot HART PMP Granularity   : 2 bits
+Boot HART PMP Address Bits  : 54
+Boot HART MHPM Info         : 29 (0xfffffff8)
+Boot HART Debug Triggers    : 0 triggers
+Boot HART MIDELEG           : 0x0000000000002222
+Boot HART MEDELEG           : 0x000000000004b109
+[    0.000000] Linux version 6.14.4 (ariel@archlinux) (riscv64-unknown-linux-gnu-gcc (g04696df09) 14.2.0, GNU ld (GNU Binutils) 2.44) #1 SMP Sat Apr 26 14:42:54 CST 2025
+[    0.000000] Machine model: ucbbar,spike-bare
+[    0.000000] SBI specification v2.0 detected
+[    0.000000] SBI implementation ID=0x1 Version=0x10006
+[    0.000000] SBI TIME extension detected
+[    0.000000] SBI IPI extension detected
+[    0.000000] SBI RFENCE extension detected
+[    0.000000] SBI SRST extension detected
+[    0.000000] SBI DBCN extension detected
+[    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+[    0.000000] printk: legacy bootconsole [sbi0] enabled
+[    0.000000] efi: UEFI not found.
+[    0.000000] OF: reserved mem: 0x0000000080000000..0x000000008003ffff (256 KiB) nomap non-reusable mmode_resv1@80000000
+[    0.000000] OF: reserved mem: 0x0000000080040000..0x000000008004ffff (64 KiB) nomap non-reusable mmode_resv0@80040000
+[    0.000000] Zone ranges:
+[    0.000000]   DMA32    [mem 0x0000000080000000-0x00000000ffffffff]
+[    0.000000]   Normal   empty
+[    0.000000] Movable zone start for each node
+[    0.000000] Early memory node ranges
+[    0.000000]   node   0: [mem 0x0000000080000000-0x000000008004ffff]
+[    0.000000]   node   0: [mem 0x0000000080050000-0x00000000ffffffff]
+[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff]
 ```