Hardware Accelerator Design for CNNs on FPGAs. This is an AI-assisted project.
The end-to-end project is explained here: CNN_Accelerator_Design_Document. For a quick overview, take a look at the CNN_Accelerator_PPT document. Target FPGA Board: AMD Kria SOM KV260 Vision AI Starter Kit.
- cpp_alexnet - C++ implementation of AlexNet CNN for object detection.
- hw-accel-cnns - C++ HLS implementation of a custom CNN designed for MNIST fashion dataset classification.
- The implementation achieves 9.32ms inference time while consuming only 3.515W in programmable logic, providing 1.4× better energy efficiency compared to CPU execution.
- The 16-bit fixed-point implementation maintains 91% classification accuracy, representing only 2.7% degradation from floating-point reference.
- The HLS IP and the hardware bitstream files can be found in the results folder.