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Default cell contiguity on top of #3299 implies that in general, CvMemList.ml.size() == 1 for each cell. The exceptions
are that CvMembList.ml.size() == 2 whenever the extracellular mechanism is present or if a synapse (of the same type) is located both in the cell rootnode and somewhere else on the cell (note that cell rootnodes for a thread are adjacent).
The node ordering of each cell (after the root node) is section depth first.
This ordering fixes most of the performance loss with respect to 8.2. With the intel compiler, performance of the ringtest with nrniv -python ringtest.py -rparm -nring 32 -npt 1 -compart 1 3 -method 2 -2nd_order_thresh is
version runtime (s)
8.2 1.4
master 6.7
This PR 2.7
I speculate that the remainder of the performance issue is the use of DataHandle during sim time instead of raw double* and that will be dealt with in subsequent pull requests.
I would like this PR to be reviewed as a change to #3299 but not merged. It can be merged to the master after #3299 is merged into the master.
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Default cell contiguity on top of #3299 implies that in general,
CvMemList.ml.size() == 1for each cell. The exceptionsare that
CvMembList.ml.size() == 2whenever the extracellular mechanism is present or if a synapse (of the same type) is located both in the cell rootnode and somewhere else on the cell (note that cell rootnodes for a thread are adjacent).The node ordering of each cell (after the root node) is section depth first.
This ordering fixes most of the performance loss with respect to 8.2. With the intel compiler, performance of the ringtest with
nrniv -python ringtest.py -rparm -nring 32 -npt 1 -compart 1 3 -method 2 -2nd_order_threshisI speculate that the remainder of the performance issue is the use of DataHandle during sim time instead of raw
double*and that will be dealt with in subsequent pull requests.I would like this PR to be reviewed as a change to #3299 but not merged. It can be merged to the master after #3299 is merged into the master.