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virt_mshv_vtl, SNP: Fix a todo in the intercept processing #1628

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virt_mshv_vtl, SNP: Fix a todo in the intercept processing #1628

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23 changes: 18 additions & 5 deletions openhcl/virt_mshv_vtl/src/processor/snp/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1623,11 +1623,24 @@ impl UhProcessor<'_, SnpBacked> {
HvMessageType::HvMessageTypeSynicSintDeliverable => {
self.handle_synic_deliverable_exit();
}
HvMessageType::HvMessageTypeX64Halt
| HvMessageType::HvMessageTypeExceptionIntercept => {
// Ignore.
//
// TODO SNP: Figure out why we are getting these.
HvMessageType::HvMessageTypeX64Halt => {
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Where is it being processed?

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  • Above in the match block, there is an arm for the HLT exit,
  • In the same block, when processing the MSR exit, read_msr_snp is called which checks for hvdef::HV_X64_MSR_GUEST_IDLE.

The intercept message from the hypervisor can't offer a better/more trustworthy data than that one (generated by the hardware). Both cases are handled with the VP "parked" in the state allowing for interrupts being delivered. That all made the impression all that's required to be done must be already done.

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Maybe we should assert or check/warn that the SevExitCode is what we'd expect here?

// Nothing to do here, the halt has already been processed.
}
HvMessageType::HvMessageTypeExceptionIntercept => {
// Only #VC's are expected due to the alternate injection.
let exception_message = self
.runner
.exit_message()
.as_message::<hvdef::HvX64ExceptionInterceptMessage>();
if exception_message.vector
!= x86defs::Exception::SEV_VMM_COMMUNICATION.0 as u16
{
tracelimit::error_ratelimited!(
CVM_ALLOWED,
"unexpected intercept message {:x?}",
exception_message
);
}
}
message_type => {
tracelimit::error_ratelimited!(
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