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[ci] Drop non-HyperDebug CW310 bitstream for testing #27644

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28 changes: 9 additions & 19 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -382,15 +382,6 @@ jobs:
path: build-bin.tar
overwrite: true

chip_earlgrey_cw310:
name: Earl Grey for CW310
needs: quick_lint
uses: ./.github/workflows/bitstream.yml
secrets: inherit
with:
top_name: earlgrey
design_suffix: cw310

chip_earlgrey_cw310_hyperdebug:
name: Earl Grey for CW310 Hyperdebug
needs: quick_lint
Expand All @@ -414,7 +405,6 @@ jobs:
runs-on: ubuntu-22.04
if: ${{ github.event_name != 'pull_request' }}
needs:
- chip_earlgrey_cw310
- chip_earlgrey_cw310_hyperdebug
- chip_earlgrey_cw340
steps:
Expand Down Expand Up @@ -447,31 +437,31 @@ jobs:
# CW310 FPGA jobs.
execute_test_rom_fpga_tests_cw310:
name: CW310 Test ROM Tests
needs: chip_earlgrey_cw310
needs: chip_earlgrey_cw310_hyperdebug
uses: ./.github/workflows/fpga.yml
secrets: inherit
with:
job_name: execute_test_rom_fpga_tests_cw310
bitstream: chip_earlgrey_cw310
bitstream: chip_earlgrey_cw310_hyperdebug
board: cw310
interface: cw310
interface: hyper310
tag_filters: cw310_test_rom

execute_rom_fpga_tests_cw310:
name: CW310 ROM Tests
needs: chip_earlgrey_cw310
needs: chip_earlgrey_cw310_hyperdebug
uses: ./.github/workflows/fpga.yml
secrets: inherit
with:
job_name: execute_rom_fpga_tests_cw310
bitstream: chip_earlgrey_cw310
bitstream: chip_earlgrey_cw310_hyperdebug
board: cw310
interface: cw310
interface: hyper310
tag_filters: "cw310_rom_with_fake_keys,cw310_rom_with_real_keys,-manuf"
timeout: 90

execute_rom_ext_fpga_tests_cw310:
name: Hyper310 ROM_EXT Tests
name: CW310 ROM_EXT Tests
needs: chip_earlgrey_cw310_hyperdebug
uses: ./.github/workflows/fpga.yml
secrets: inherit
Expand All @@ -480,7 +470,7 @@ jobs:
bitstream: chip_earlgrey_cw310_hyperdebug
board: cw310
interface: hyper310
tag_filters: hyper310_rom_ext
tag_filters: cw310_rom_ext

execute_sival_fpga_tests_cw310:
name: CW310 SiVal Tests
Expand Down Expand Up @@ -589,7 +579,7 @@ jobs:
bitstream: chip_earlgrey_cw340
board: cw340
interface: cw340
tag_filters: "manuf,-hyper310"
tag_filters: "manuf,-cw310"

verify_fpga_jobs:
name: Verify FPGA jobs
Expand Down
18 changes: 9 additions & 9 deletions .github/workflows/nightly.yml
Original file line number Diff line number Diff line change
Expand Up @@ -48,43 +48,43 @@ jobs:

execute_fpga_cw310_test_rom_tests:
name: CW310 Test ROM Tests
needs: chip_earlgrey_cw310
needs: chip_earlgrey_cw310_hyperdebug
uses: ./.github/workflows/fpga.yml
secrets: inherit
with:
job_name: execute_fpga_cw310_test_rom_tests
bitstream: chip_earlgrey_cw310
bitstream: chip_earlgrey_cw310_hyperdebug
board: cw310
interface: cw310
interface: hyper310
tag_filters: cw310_test_rom,-broken,-manual
add_default_filters: false
cache_test_results: false

execute_fpga_cw310_rom_tests:
name: CW310 ROM Tests
needs: chip_earlgrey_cw310
needs: chip_earlgrey_cw310_hyperdebug
uses: ./.github/workflows/fpga.yml
secrets: inherit
with:
job_name: execute_fpga_cw310_rom_tests
bitstream: chip_earlgrey_cw310
bitstream: chip_earlgrey_cw310_hyperdebug
board: cw310
interface: cw310
interface: hyper310
tag_filters: cw310_rom_with_fake_keys,-broken,-manual
add_default_filters: false
cache_test_results: false
timeout: 240

execute_fpga_cw310_rom_ext_tests:
name: CW310 ROM_EXT Tests
needs: chip_earlgrey_cw310
needs: chip_earlgrey_cw310_hyperdebug
uses: ./.github/workflows/fpga.yml
secrets: inherit
with:
job_name: execute_fpga_cw310_rom_ext_tests
bitstream: chip_earlgrey_cw310
bitstream: chip_earlgrey_cw310_hyperdebug
board: cw310
interface: cw310
interface: hyper310
tag_filters: cw310_rom_ext,-broken,-manual
add_default_filters: false
cache_test_results: false
Expand Down
66 changes: 6 additions & 60 deletions hw/top_earlgrey/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -93,13 +93,12 @@ fpga_cw310(
"//conditions:default": [],
}),
base = ":fpga_cw310",
base_bitstream = "//hw/bitstream:bitstream",
base_bitstream = "//hw/bitstream/hyperdebug:bitstream",
exec_env = "fpga_cw310_test_rom",
mmi = "//hw/bitstream:cw310_mmi",
openocd_adapter_config = "//third_party/openocd:jtag_olimex_cfg",
mmi = "//hw/bitstream/hyperdebug:mmi",
otp = "//hw/top_earlgrey/data/otp:img_rma",
param = {
"interface": "cw310",
"interface": "hyper310",
"exit_success": DEFAULT_TEST_SUCCESS_MSG,
"exit_failure": DEFAULT_TEST_FAILURE_MSG,
},
Expand Down Expand Up @@ -161,66 +160,13 @@ fpga_cw310(
linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
manifest = "//sw/device/silicon_owner:manifest",
otp = "//sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_rma",
param = {
"interface": "cw310",
"exit_success": DEFAULT_TEST_SUCCESS_MSG,
"exit_failure": DEFAULT_TEST_FAILURE_MSG,
"assemble": "{rom_ext}@0 {firmware}@0x10000",
},
rom = "//sw/device/silicon_creator/rom:mask_rom",
rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
)

fpga_cw310(
name = "fpga_hyper310_rom_with_fake_keys",
testonly = True,
args = [
"--rcfile=",
"--logging=info",
"--interface={interface}",
],
base = ":fpga_cw310",
base_bitstream = "//hw/bitstream/hyperdebug:bitstream",
ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "test_key_0"},
exec_env = "fpga_hyper310_rom_with_fake_keys",
manifest = "//sw/device/silicon_creator/rom_ext:manifest",
mmi = "//hw/bitstream/hyperdebug:mmi",
otp = "//hw/top_earlgrey/data/otp:img_rma",
param = {
"interface": "hyper310",
"exit_success": DEFAULT_TEST_SUCCESS_MSG,
"exit_failure": DEFAULT_TEST_FAILURE_MSG,
},
rom = "//sw/device/silicon_creator/rom:mask_rom",
test_cmd = """
--exec="transport init"
--exec="fpga load-bitstream {bitstream}"
--exec="bootstrap --clear-uart=true {firmware}"
--exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
no-op
""",
)

fpga_cw310(
name = "fpga_hyper310_rom_ext",
testonly = True,
base = ":fpga_hyper310_rom_with_fake_keys",
ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:app_prod_ecdsa": "prod_key_0"},
exec_env = "fpga_hyper310_rom_ext",
libs = [
"//sw/device/lib/arch:boot_stage_owner",
"//sw/device/lib/arch:fpga_cw310",
"//hw/top_earlgrey/sw/dt:fpga_cw310",
],
linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
manifest = "//sw/device/silicon_owner:manifest",
otp = "//sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_rma",
param = {
"interface": "hyper310",
"exit_success": DEFAULT_TEST_SUCCESS_MSG,
"exit_failure": DEFAULT_TEST_FAILURE_MSG,
"assemble": "{rom_ext}@0 {firmware}@0x10000",
},
rom = "//sw/device/silicon_creator/rom:mask_rom",
rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
)

Expand All @@ -232,7 +178,7 @@ fpga_cw310(
fpga_cw310(
name = "fpga_cw310_sival",
testonly = True,
base = ":fpga_hyper310_rom_with_fake_keys",
base = ":fpga_cw310_rom_with_fake_keys",

# PROD keys are allowed to run across all life cycle stages. This prod key
# is used to enable execution across life cycle stages with a single
Expand All @@ -251,7 +197,7 @@ fpga_cw310(
fpga_cw310(
name = "fpga_cw310_sival_rom_ext",
testonly = True,
base = ":fpga_hyper310_rom_ext",
base = ":fpga_cw310_rom_ext",
ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:app_prod_ecdsa": "prod_key_0"},
exec_env = "fpga_cw310_sival_rom_ext",
libs = [
Expand Down
18 changes: 9 additions & 9 deletions sw/device/silicon_creator/manuf/base/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ opentitan_binary(
testonly = True,
srcs = ["sram_cp_provision.c"],
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
"//hw/top_earlgrey:silicon_creator": None,
},
Expand Down Expand Up @@ -85,7 +85,7 @@ opentitan_binary(
testonly = True,
srcs = ["sram_cp_provision_functest.c"],
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
"//hw/top_earlgrey:silicon_creator": None,
},
Expand Down Expand Up @@ -128,7 +128,7 @@ _CP_PROVISIONING_HARNESS = "//sw/host/provisioning/cp"
opentitan_test(
name = "cp_provision",
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
"//hw/top_earlgrey:silicon_creator": None,
},
Expand All @@ -154,7 +154,7 @@ opentitan_test(
opentitan_test(
name = "cp_provision_functest",
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
},
fpga = fpga_params(
Expand All @@ -180,7 +180,7 @@ opentitan_test(
testonly = True,
srcs = ["sram_ft_individualize.c"],
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
"//hw/top_earlgrey:silicon_creator": None,
},
Expand Down Expand Up @@ -298,7 +298,7 @@ manifest(d = {
srcs = ["ft_personalize.c"],
ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
"//hw/top_earlgrey:silicon_creator": None,
},
Expand Down Expand Up @@ -360,7 +360,7 @@ _FT_PROVISIONING_HARNESS = "//sw/host/provisioning/ft:ft_{}"
config["owner_fw"]: OWNER_SLOTS["b"],
},
exec_env = [
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys",
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
"//hw/top_earlgrey:silicon_creator",
],
Expand All @@ -385,7 +385,7 @@ filegroup(
opentitan_test(
name = "ft_provision_{}".format(sku),
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_sival": None,
"//hw/top_earlgrey:silicon_creator": None,
Expand Down Expand Up @@ -443,7 +443,7 @@ test_suite(
name = "ft_provision_cw310",
tags = ["manual"],
tests = [
":ft_provision_{}_fpga_hyper310_rom_with_fake_keys".format(sku)
":ft_provision_{}_fpga_cw310_rom_with_fake_keys".format(sku)
for sku in EARLGREY_SKUS.keys()
],
)
Expand Down
8 changes: 4 additions & 4 deletions sw/device/silicon_creator/manuf/lib/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -141,7 +141,7 @@ opentitan_test(
name = "individualize_functest",
srcs = ["individualize_functest.c"],
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_sival": None,
},
fpga = fpga_params(
Expand Down Expand Up @@ -205,7 +205,7 @@ opentitan_test(
name = "individualize_sw_cfg_functest",
srcs = ["individualize_sw_cfg_functest.c"],
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
},
fpga = fpga_params(
Expand Down Expand Up @@ -264,7 +264,7 @@ opentitan_test(
srcs = ["personalize_functest.c"],
ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:dev_key_0_ecdsa_p256": "dev_key_0"},
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
},
fpga = fpga_params(
changes_otp = True,
Expand Down Expand Up @@ -327,7 +327,7 @@ opentitan_test(
"AST_PROGRAM_UNITTEST=1",
],
exec_env = {
"//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
"//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
},
fpga = fpga_params(
tags = ["manuf"],
Expand Down
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