This project validates AMBA AXI-Lite protocol compliance through a SystemVerilog-based checker with directed stimulus, assertions, and coverage.
- Vivado XSIM 2025.1
- WSL2 (Ubuntu)
- Git (version control)
axi_lite_dut.sv
— DUT modelaxi_lite_driver.sv
— Simple driver for write/readaxi_lite_tb.sv
— Testbench wrapperaxi_lite_monitor.sv
— Monitorwave.do
— Waveform scriptREADME.md
— Documentation
- Directed test for write transaction
- SystemVerilog assertions for handshake protocol correctness
- Functional coverage via covergroups
- Simulated using Vivado CLI and waveform viewed with
xsim
- Protocol violations caught with assertions
- 100% stimulus coverage achieved
- Designed for future expansion into AXI4 and UVM environments
xvlog -sv axi_lite_dut.sv axi_lite_driver.sv axi_lite_tb.sv axi_lite_monitor.sv xelab work.axi_lite_tb -s axi_sim -debug all -timescale 1ns/1ps xsim axi_sim -gui do wave.do run 200ns
Click to view: Waveform Screenshot
-Extend to full AXI4 protocol with burst and ID support -Convert the testbench into a reusable UVM agent (driver, monitor, sequencer) -Integrate constrained-random sequences and layered tests -Enable coverage-driven closure and regression testing with CI