Add AD9084 filter APIs

.pre-commit-config.yaml

@@ -27,7 +27,7 @@ repos:
     - id: black
       language_version: python3
       additional_dependencies: ['click==8.0.4']
-      args: [--exclude=./test/emu]
+      args: [--exclude=./test/emu,--exclude=./test/ad9084_filters]
 -   repo: https://github.com/asottile/blacken-docs
     rev: v1.12.0
     hooks:

adi/ad9084.py

@@ -479,6 +479,30 @@ def dac_frequency(self):
         """dac_frequency: DAC frequency in Hz"""
         return self._get_iio_attr_single("voltage0_i", "dac_frequency", True)
 
+    def write_pfilt_config(self, value):
+        """Load a new PFILT configuration file
+        Input is path to PFILT configuration file. Please see
+        driver documentation about PFILT generation and limitations
+        """
+        with open(value, "r") as file:
+            data = file.read()
+        self._set_iio_dev_attr_str("pfir_config", data)
+
+    def write_cfir_config(self, value):
+        """Load a new CFIR configuration file
+        Input is path to CFIR configuration file. Please see
+        driver documentation about CFIR generation and limitations
+        """
+        with open(value, "r") as file:
+            data = file.read()
+        self._set_iio_dev_attr_str("cfir_config", data)
+
+    # we cannot really get the profile. The driver will just throw EPERM
+    pfilt_config = property(None, write_pfilt_config)
+
+    # we cannot really get the profile. The driver will just throw EPERM
+    pfilt_config = property(None, write_pfilt_config)
+
     @property
     def jesd204_fsm_ctrl(self):
         """jesd204_fsm_ctrl: jesd204-fsm control"""

test/ad9084_filters/cfir_hp_rx.txt

@@ -0,0 +1,24 @@
+# coeffs_16_hp0.txt
+dest: rx cfir_all profile_1 datapath_all
+gain: 0
+complex_scalar: 32767 0
+enable: 1 profile_1
+selection_mode: direct_regmap
+coeff_transfer: 0
+bypass: 0
+64515 64515
+65535 65535
+0 0
+0 0
+3598 3598
+65535 65535
+45971 45971
+32767 32767
+45971 45971
+65535 65535
+3598 3598
+0 0
+0 0
+65535 65535
+64515 64515
+0 0

test/ad9084_filters/cfir_lp_rx.txt

@@ -0,0 +1,25 @@
+# pfilt_coeffs_16_lp0.txt
+dest: rx cfir_all profile_2 datapath_all
+gain: 0
+complex_scalar: 32767 0
+enable: 1 profile_2
+selection_mode: direct_regmap
+coeff_transfer: 0
+bypass: 0
+242 242
+541 541
+151 151
+64329 64329
+63642 63642
+650 650
+6461 6461
+11575 11575
+11575 11575
+6461 6461
+650 650
+63642 63642
+64329 64329
+151 151
+541 541
+242 242
+

test/ad9084_filters/cfir_lp_tx.txt

@@ -0,0 +1,25 @@
+# coeffs_16_lp0.txt
+dest: tx cfir_all profile_all datapath_all
+gain: 0
+complex_scalar: 32767 0
+enable: 1 profile_2
+selection_mode: direct_regmap
+coeff_transfer: 0
+bypass: 0
+242 242
+541 541
+151 151
+64329 64329
+63642 63642
+650 650
+6461 6461
+11575 11575
+11575 11575
+6461 6461
+650 650
+63642 63642
+64329 64329
+151 151
+541 541
+242 242
+

test/ad9084_filters/pfilt_hp_rx.txt

@@ -0,0 +1,43 @@
+# pfilt_coeffs_16_lp0.txt
+mode: real_n2 real_n2
+gain: 6 6 6 6
+scalar_gain: 63 63 63 63
+dest: rx pfilt_all bank_0
+hc_delay: 0
+mode_switch_en: 0
+mode_switch_add_en: 0
+real_data_mode_en: 1
+quad_mode_en: 0
+0x00F2
+0xFDE3
+0x0096
+0x04B8
+0xF89A
+0xFD75
+0x193D
+0xD2CA
+0x2D36
+0xE6C3
+0x028B
+0x0766
+0xFB48
+0xFF6A
+0x021D
+0xFF0E
+0x00F2
+0xFDE3
+0x0096
+0x04B8
+0xF89A
+0xFD75
+0x193D
+0xD2CA
+0x2D36
+0xE6C3
+0x028B
+0x0766
+0xFB48
+0xFF6A
+0x021D
+0xFF0E
+

test/ad9084_filters/pfilt_off_rx.txt

@@ -0,0 +1,40 @@
+# pfilt_coeffs_16_lp0.txt
+mode: disabled disabled
+gain: 0 0 0 0
+dest: rx pfilt_a0 bank_0
+hc_delay: 0
+mode_switch_en: 0
+mode_switch_add_en: 0
+real_data_mode_en: 0
+quad_mode_en: 0
+0x0027
+0xFE01
+0xFE58
+0x0538
+0x0063
+0xF23E
+0x0A98
+0x3FC3
+0x3FC3
+0x0A98
+0xF23E
+0x0063
+0x0538
+0xFE58
+0xFE01
+0x0027
+0x0027
+0xFE01
+0xFE58
+0x0538
+0x0063
+0xF23E
+0x0A98
+0x3FC3
+0x3FC3
+0x0A98
+0xF23E
+0x0063
+0x0538
+0xFE58
+0xFE01

test/test_ad9084.py

@@ -330,3 +330,25 @@ def test_ad9084_tx_data_split_buffers(
     test_dma_tx, iio_uri, classname, channel, use_tx2
 ):
     test_dma_tx(iio_uri, classname, channel, use_tx2)
+
+
+#########################################
+@pytest.mark.iio_hardware("adsy1100")
+def test_pfilt(iio_uri):
+    import adi
+
+    dev = adi.ad9084(uri=iio_uri)
+    this_dir = dirname(realpath(__file__))
+    pfilt_config = join(this_dir, "pfilt_hp_rx.txt")
+    dev.write_pfilt_config(pfilt_config)
+
+
+#########################################
+@pytest.mark.iio_hardware("adsy1100")
+def test_cfilt(iio_uri):
+    import adi
+
+    dev = adi.ad9084(uri=iio_uri)
+    this_dir = dirname(realpath(__file__))
+    cfilt_config = join(this_dir, "cfir_lp_rx.txt")
+    dev.write_cfilt_config(cfilt_config)