DFT_for_Asynchronous_FIFO

Netlist without Test logic- GUI screenshot

Screenshot of schematic without test logic

Netlist after inserting test-GUI screenshot

Screenshot of scan chain report

Screenshot of schematic after inserting test

References

Simulation and Synthesis Techniques for Asynchronous FIFO Design Clifford E. Cummings, Sunburst Design, Inc.

Prepared By

B M Madhumitha, Sharanya Shetty and Aryan Kumar