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arm64: isr_wrapper.S: make GICv2 usable on SMP systems #93629

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@npitre npitre commented Jul 24, 2025

GICC_IAR (GICv2) includes the source processor for SGIs in bits 12-10.
Mask them away otherwise IPIs sent from any CPU other than CPU0 will be
considered out of bounds.

Fixes #93545

GICC_IAR (GICv2) includes the source processor for SGIs in bits 12-10.
Mask them away otherwise IPIs sent from any CPU other than CPU0 will be
considered out of bounds.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
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@JarmouniA
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Cc @dylan-hong-nc

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Thank you for reflecting my issue report.

It seems that you have improved the solution I suggested so that it is not affected by gicv3 or higher.
I applied the modified code to my code and confirmed that SMP TESTSUITE is running normally on the board under test.

Thank you.

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Reporting SMP malfunction in ARM64 environment
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