soc: ambiq: apollo2: Add support for Apollo2 SOC Series

boards/ambiq/apollo2_evb/Kconfig.apollo2_evb

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2025 Linumiz GmbH
+# Author: Sri Surya  <srisurya@linumiz.com>
+
+config BOARD_APOLLO2_EVB
+	select SOC_APOLLO2

boards/ambiq/apollo2_evb/apollo2_evb-pinctrl.dtsi

@@ -0,0 +1,21 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2025 Linumiz GmbH
+ * Author: Sri Surya  <srisurya@linumiz.com>
+ */
+
+#include <dt-bindings/pinctrl/ambiq-apollo2-pinctrl.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <UART0TX_P22>;
+		};
+
+		group2 {
+			pinmux = <UART0RX_P23>;
+			input-enable;
+		};
+	};
+};

boards/ambiq/apollo2_evb/apollo2_evb.dts

@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/dts-v1/;
+#include <ambiq/ambiq_apollo2.dtsi>
+
+#include "apollo2_evb-pinctrl.dtsi"
+
+/ {
+	model = "Ambiq Apollo2 evaluation board";
+	compatible = "ambiq,apollo2_evb";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,uart-mcumgr = &uart0;
+		zephyr,uart-pipe = &uart0;
+	};
+};
+
+&flash0 {
+	erase-block-size = <8192>;
+	write-block-size = <4>;
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@c000 {
+			label = "mcuboot";
+			reg = <0x0000c000 0xc000>;
+		};
+
+		slot0_partition: partition@18000 {
+			label = "image-0";
+			reg = <0x00018000 0x72000>;
+		};
+
+		slot1_partition: partition@8a000 {
+			label = "image-1";
+			reg = <0x0008a000 0x72000>;
+		};
+
+		storage_partition: partition@fc000 {
+			label = "storage";
+			reg = <0x000fc000 0x4000>;
+		};
+	};
+};
+
+&uart0 {
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/ambiq/apollo2_evb/apollo2_evb.yaml

@@ -0,0 +1,15 @@
+identifier: apollo2_evb
+name: Apollo2 EVB
+type: mcu
+arch: arm
+ram: 256
+flash: 1024
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - uart
+testing:
+  ignore_tags:
+    - net
+vendor: ambiq

boards/ambiq/apollo2_evb/apollo2_evb_defconfig

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+#  Copyright (c) 2025 Linumiz GmbH
+#  Author: Sri Surya  <srisurya@linumiz.com>
+
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y

boards/ambiq/apollo2_evb/board.cmake

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2025 Linumiz GmbH
+# Author: Sri Surya  <srisurya@linumiz.com>
+
+board_runner_args(jlink "--device=AMA2B1KK" "--iface=swd" "--speed=4000")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/ambiq/apollo2_evb/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: apollo2_evb
+  full_name: Apollo2 EVB
+  vendor: ambiq
+  socs:
+  - name: apollo2

boards/ambiq/apollo2_evb/doc/index.rst

@@ -0,0 +1,63 @@
+.. zephyr:board:: apollo2_evb
+
+The Apollo2 EVB is a board by Ambiq featuring their ultra-low power Apollo2 SoC.
+
+Hardware
+********
+
+The Ambiq Apollo2 SoC provides the following hardware features:
+
+- ARM® Cortex® M4F core with a Floating Point Unit
+- Up to 48 MHz operating frequency
+- 16 kB 2-way Associative Cache
+- Up to 1 MB of flash memory for code/data
+- Up to 256 KB of low leakage RAM for code/data
+
+For more information about the Apollo2 SoC and a potential Apollo2 EVB board:
+
+* `Apollo2 SoC Website <https://ambiq.com/apollo2/>`_
+* `Apollo2 SoC Datasheet <https://www.fujitsu.com/uk/imagesgig5/Apollo2_Blue_MCU_Data_Sheet_rev0p8.pdf>`_
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Programming and Debugging
+=========================
+
+Flashing an application
+-----------------------
+
+Connect your device to your host computer using the JLINK USB port.
+The sample application :zephyr:code-sample:`hello_world` is used for this example.
+Build the Zephyr kernel and application, then flash it to the device:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: apollo2_evb
+   :goals: flash
+
+.. note::
+   ``west flash`` requires `SEGGER J-Link software`_ and `pylink`_ Python module
+   to be installed on you host computer.
+
+Open a serial terminal (minicom, putty, etc.) with the following settings:
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Reset the board and you should be able to see on the corresponding Serial Port
+the following message:
+
+.. code-block:: console
+
+   Hello World! apollo2_evb
+
+.. _SEGGER J-Link software:
+   https://www.segger.com/downloads/jlink
+
+.. _pylink:
+   https://github.com/Square/pylink

drivers/pinctrl/Kconfig.ambiq

@@ -1,11 +1,13 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 # Copyright (c) 2023 Antmicro <www.antmicro.com>
+# Copyright (c) 2025 Linumiz GmbH
 
 config PINCTRL_AMBIQ
 	bool "Ambiq Apollo pin controller driver"
 	default y
-	depends on DT_HAS_AMBIQ_APOLLO5_PINCTRL_ENABLED || DT_HAS_AMBIQ_APOLLO4_PINCTRL_ENABLED || DT_HAS_AMBIQ_APOLLO3_PINCTRL_ENABLED
+	depends on DT_HAS_AMBIQ_APOLLO5_PINCTRL_ENABLED || DT_HAS_AMBIQ_APOLLO4_PINCTRL_ENABLED || \
+			DT_HAS_AMBIQ_APOLLO3_PINCTRL_ENABLED || DT_HAS_AMBIQ_APOLLO2_PINCTRL_ENABLED
 	select AMBIQ_HAL
 	select AMBIQ_HAL_USE_GPIO
 	help

drivers/pinctrl/pinctrl_ambiq.c

@@ -1,6 +1,7 @@
 /*
  * Copyright (c) 2023 Antmicro <www.antmicro.com>
- *
+ * Copyright (c) 2025 Linumiz GmbH
+
  * SPDX-License-Identifier: Apache-2.0
  */
 
@@ -9,6 +10,59 @@
 /* ambiq-sdk includes */
 #include <soc.h>
 
+#if defined(CONFIG_SOC_SERIES_APOLLO2X)
+static void pinctrl_configure_pin(const pinctrl_soc_pin_t *cfg)
+{
+	uint32_t config = 0;
+
+	if (cfg->alt_func) {
+		config |= AM_HAL_GPIO_FUNC(cfg->alt_func);
+	}
+
+	if (cfg->input_enable) {
+		config |= AM_HAL_GPIO_INPEN;
+	}
+
+	switch (cfg->drive_strength) {
+	case 2:
+		config |= AM_HAL_GPIO_DRIVE_2MA;
+		break;
+	case 4:
+		config |= AM_HAL_GPIO_DRIVE_4MA;
+		break;
+	case 8:
+		config |= AM_HAL_GPIO_DRIVE_8MA;
+		break;
+	case 12:
+		config |= AM_HAL_GPIO_DRIVE_12MA;
+		break;
+	}
+
+	if (cfg->bias_pull_up) {
+
+		switch (cfg->ambiq_pull_up_ohms) {
+		case 1500:
+			config |= AM_HAL_GPIO_PULL1_5K;
+			break;
+		case 6000:
+			config |= AM_HAL_GPIO_PULL6K;
+			break;
+		case 12000:
+			config |= AM_HAL_GPIO_PULL12K;
+			break;
+		case 24000:
+			config |= AM_HAL_GPIO_PULL24K;
+			break;
+		}
+	}
+
+	if (cfg->open_drain) {
+		config |= AM_HAL_GPIO_OUT_OPENDRAIN;
+	}
+
+	am_hal_gpio_pin_config(cfg->pin_num, config);
+}
+#else
 static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
 {
 	am_hal_gpio_pincfg_t pin_config = {0};
@@ -86,6 +140,7 @@ static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
 #endif
 	am_hal_gpio_pinconfig(pin->pin_num, pin_config);
 }
+#endif
 
 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
 {
@@ -94,6 +149,5 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
 	for (uint8_t i = 0U; i < pin_cnt; i++) {
 		pinctrl_configure_pin(pins++);
 	}
-
 	return 0;
 }