stm32: boards: nucleo_u385rg_q: update clock domain source for rng peripheral #92968
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Several tests failed due to a low clock frequency for the RNG peripheral. Increase the RNG clock frequency by providing MSIK with 96 MHz as the domain source. Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
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Several tests failed (crypto, random, jwt, uuid, ...) due to a
low clock frequencyfor the RNG peripheral.Increase the RNG clock frequency by providing MSIK with 96 MHz as the domain source.