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soc: riscv: Remove redundant __soc_is_irq implementations #92696

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3 changes: 0 additions & 3 deletions soc/sensry/ganymed/sy1xx/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,6 @@ config USE_DT_CODE_PARTITION
config RISCV_SOC_HAS_CUSTOM_IRQ_LOCK_OPS
default n

config RISCV_SOC_EXCEPTION_FROM_IRQ
default y

config INIT_STACKS
default y

Expand Down
6 changes: 0 additions & 6 deletions soc/sensry/ganymed/sy1xx/common/crt0.S
Original file line number Diff line number Diff line change
Expand Up @@ -26,12 +26,6 @@ __prestart_routine:
/* Call into Zephyr initialization. */
jal x0, __start

GTEXT(__soc_is_irq)
SECTION_FUNC(exception.other, __soc_is_irq)
csrr a0, mcause
srli a0, a0, 31
ret

GTEXT(__soc_handle_irq)
SECTION_FUNC(exception.other, __soc_handle_irq)
## clear pending interrupt
Expand Down
6 changes: 0 additions & 6 deletions soc/wch/ch32v/ch32v00x/soc_irq.S
Original file line number Diff line number Diff line change
Expand Up @@ -8,13 +8,7 @@
#include <zephyr/toolchain.h>

/* Exports */
GTEXT(__soc_is_irq)
GTEXT(__soc_handle_irq)

SECTION_FUNC(exception.other, __soc_is_irq)
csrr a0, mcause
srli a0, a0, 31
ret

SECTION_FUNC(exception.other, __soc_handle_irq)
ret
6 changes: 0 additions & 6 deletions soc/wch/ch32v/qingke_v2a/soc_irq.S
Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,7 @@
#include <zephyr/toolchain.h>

/* Exports */
GTEXT(__soc_is_irq)
GTEXT(__soc_handle_irq)

SECTION_FUNC(exception.other, __soc_is_irq)
csrr a0, mcause
srli a0, a0, 31
ret

SECTION_FUNC(exception.other, __soc_handle_irq)
ret
6 changes: 0 additions & 6 deletions soc/wch/ch32v/qingke_v4b/soc_irq.S
Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,7 @@
#include <zephyr/toolchain.h>

/* Exports */
GTEXT(__soc_is_irq)
GTEXT(__soc_handle_irq)

SECTION_FUNC(exception.other, __soc_is_irq)
csrr a0, mcause
srli a0, a0, 31
ret

SECTION_FUNC(exception.other, __soc_handle_irq)
ret
6 changes: 0 additions & 6 deletions soc/wch/ch32v/qingke_v4c/soc_irq.S
Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,7 @@
#include <zephyr/toolchain.h>

/* Exports */
GTEXT(__soc_is_irq)
GTEXT(__soc_handle_irq)

SECTION_FUNC(exception.other, __soc_is_irq)
csrr a0, mcause
srli a0, a0, 31
ret

SECTION_FUNC(exception.other, __soc_handle_irq)
ret
6 changes: 0 additions & 6 deletions soc/wch/ch32v/qingke_v4f/soc_irq.S
Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,7 @@
#include <zephyr/toolchain.h>

/* Exports */
GTEXT(__soc_is_irq)
GTEXT(__soc_handle_irq)

SECTION_FUNC(exception.other, __soc_is_irq)
csrr a0, mcause
srli a0, a0, 31
ret

SECTION_FUNC(exception.other, __soc_handle_irq)
ret