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STM32MP2: add I2C support #92185

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aa9b973
modules: hal_stm32: update the HAL to integrate I2C8 clock configuration
Jul 7, 2025
36d6b49
drivers: pinctrl: stm32: add gpioz pinctrl support for STM32MP2
Jul 3, 2025
aa5fef3
drivers: gpio: stm32: add gpioz support for the STM32MP2
Jul 3, 2025
ca2f0ff
dts: arm: st: stm32mp2_m33.dtsi: add node gpioz
Jul 3, 2025
a35791d
dt-bindings: stm32mp2_clock.h: add clock for i2c peripherals
Jun 19, 2025
884c7ac
drivers: clock_stm32_ll_mp2: add i2c clock
Jun 24, 2025
18672ba
drivers: i2c: Kconfig.stm32: enable combined interrupt for STM32MP2
Jun 23, 2025
0774d45
dts: arm: st: stm32mp2_m33.dtsi: add i2c nodes
Jun 19, 2025
432fb47
boards: st: stm32mp257f_ev1_stm32mp257fxx_m33.yaml: update documentation
Jun 19, 2025
f038a95
stm32mp257f_ev1_stm32mp257fxx_m33.dts: add i2c node
Jun 25, 2025
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10 changes: 10 additions & 0 deletions boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts
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Expand Up @@ -57,6 +57,10 @@
status = "okay";
};

&gpioz {
status = "okay";
};

&uart5 {
pinctrl-0 = <&uart5_tx_pg9 &uart5_rx_pg10>;
pinctrl-names = "default";
Expand All @@ -70,3 +74,9 @@
current-speed = <115200>;
status = "disabled";
};

&i2c8 {
pinctrl-0 = <&i2c8_scl_pz4 &i2c8_sda_pz3>;
pinctrl-names = "default";
status = "okay";
};
1 change: 1 addition & 0 deletions boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml
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Expand Up @@ -9,6 +9,7 @@ supported:
- LED
- gpio
- shell
- i2c
testing:
ignore_tags:
- cmsis_rtos_v2
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18 changes: 18 additions & 0 deletions drivers/clock_control/clock_stm32_ll_mp2.c
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Expand Up @@ -72,6 +72,24 @@ static int stm32_clock_control_get_subsys_rate(const struct device *dev,
case STM32_CLOCK_PERIPH_UART9:
*rate = LL_RCC_GetUARTClockFreq(LL_RCC_UART9_CLKSOURCE);
break;
case STM32_CLOCK_PERIPH_I2C1:
case STM32_CLOCK_PERIPH_I2C2:
*rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C12_I3C12_CLKSOURCE);
break;
case STM32_CLOCK_PERIPH_I2C4:
case STM32_CLOCK_PERIPH_I2C6:
*rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C46_CLKSOURCE);
break;
case STM32_CLOCK_PERIPH_I2C3:
case STM32_CLOCK_PERIPH_I2C5:
*rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C35_I3C3_CLKSOURCE);
break;
case STM32_CLOCK_PERIPH_I2C7:
*rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C7_CLKSOURCE);
break;
case STM32_CLOCK_PERIPH_I2C8:
*rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C8_CLKSOURCE);
break;
default:
return -ENOTSUP;
}
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1 change: 1 addition & 0 deletions drivers/gpio/gpio_stm32.c
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Expand Up @@ -789,3 +789,4 @@ GPIO_DEVICE_INIT_STM32_IF_OKAY(n, N);
GPIO_DEVICE_INIT_STM32_IF_OKAY(o, O);
GPIO_DEVICE_INIT_STM32_IF_OKAY(p, P);
GPIO_DEVICE_INIT_STM32_IF_OKAY(q, Q);
GPIO_DEVICE_INIT_STM32_IF_OKAY(z, Z);
3 changes: 2 additions & 1 deletion drivers/i2c/Kconfig.stm32
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Expand Up @@ -41,7 +41,8 @@ config I2C_STM32_COMBINED_INTERRUPT
depends on I2C_STM32_INTERRUPT
default y if SOC_SERIES_STM32C0X || SOC_SERIES_STM32F0X || \
SOC_SERIES_STM32G0X || SOC_SERIES_STM32L0X || \
SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X
SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X || \
SOC_SERIES_STM32MP2X

config I2C_STM32_BUS_RECOVERY
bool "Bus recovery support"
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9 changes: 9 additions & 0 deletions drivers/pinctrl/pinctrl_stm32.c
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Expand Up @@ -66,6 +66,15 @@ static const struct device *const gpio_ports[] = {
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioo)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiop)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioq)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpior)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpios)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiot)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiou)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiov)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiow)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiox)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioy)),
DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioz)),
};

/** Number of GPIO ports. */
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105 changes: 105 additions & 0 deletions dts/arm/st/mp2/stm32mp2_m33.dtsi
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Expand Up @@ -10,6 +10,7 @@
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/clock/stm32mp2_clock.h>
#include <zephyr/dt-bindings/reset/stm32mp2_reset.h>
#include <zephyr/dt-bindings/i2c/i2c.h>

/ {
cpus {
Expand Down Expand Up @@ -158,6 +159,14 @@
reg = <0x442e0000 DT_SIZE_K(1)>;
status = "disabled";
};

gpioz: gpio@46200000 {
compatible = "st,stm32mp2-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x46200000 DT_SIZE_K(1)>;
status = "disabled";
};
};

usart1: serial@40330000 {
Expand Down Expand Up @@ -240,6 +249,102 @@
interrupts = <150 0>;
status = "disabled";
};

i2c1: i2c@40120000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40120000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C1, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <108 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c2: i2c@40130000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40130000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C2, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <110 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c3: i2c@40140000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40140000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C3, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <137 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c4: i2c@40150000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40150000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C4, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <168 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c5: i2c@40160000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40160000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C5, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <181 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c6: i2c@40170000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40170000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C6, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <208 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c7: i2c@40180000 {
compatible = "st,stm32-i2c-v2";
reg = <0x40180000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C7, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <210 0>;
interrupt-names = "combined";
status = "disabled";
};

i2c8: i2c@46040000 {
compatible = "st,stm32-i2c-v2";
reg = <0x46040000 DT_SIZE_K(1)>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(I2C8, STM32_CLK)>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <212 0>;
interrupt-names = "combined";
status = "disabled";
};
};
};

Expand Down
12 changes: 11 additions & 1 deletion include/zephyr/dt-bindings/clock/stm32mp2_clock.h
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Expand Up @@ -50,7 +50,17 @@
#define STM32_CLOCK_PERIPH_UART8 0x798
#define STM32_CLOCK_PERIPH_UART9 0x79C

/* I2C Peripheral */
#define STM32_CLOCK_PERIPH_I2C1 0x7A0
#define STM32_CLOCK_PERIPH_I2C2 0x7A8
#define STM32_CLOCK_PERIPH_I2C3 0x7AC
#define STM32_CLOCK_PERIPH_I2C4 0x7B0
#define STM32_CLOCK_PERIPH_I2C5 0x7B4
#define STM32_CLOCK_PERIPH_I2C6 0x7B8
#define STM32_CLOCK_PERIPH_I2C7 0x7BC
#define STM32_CLOCK_PERIPH_I2C8 0x7C0

#define STM32_CLOCK_PERIPH_MIN STM32_CLOCK_PERIPH_GPIOA
#define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_UART9
#define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_I2C8

#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32MP2_CLOCK_H_ */
3 changes: 2 additions & 1 deletion include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h
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Expand Up @@ -27,9 +27,10 @@
#define STM32_PORTO 14
#define STM32_PORTP 15 /* IO port P (0xF) */
#define STM32_PORTQ 16 /* IO port Q (0x10) */
#define STM32_PORTZ 25 /* IO port Z (0x19) */

#ifndef STM32_PORTS_MAX
#define STM32_PORTS_MAX (STM32_PORTQ + 1)
#define STM32_PORTS_MAX (STM32_PORTZ + 1)
#endif

/**
Expand Down
4 changes: 2 additions & 2 deletions include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h
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Expand Up @@ -55,8 +55,8 @@
* - line [ 5 : 8 ]
* - port [ 9 : 13 ]
*
* @param port Port ('A'..'Q')
* @param line Pin (0..15)
* @param port Port ('A'..'Q', 'Z')
* @param line Pin (0..25)
* @param mode Mode (ANALOG, GPIO_IN, ALTERNATE).
*/
#define STM32_PINMUX(port, line, mode) \
Expand Down
2 changes: 1 addition & 1 deletion west.yml
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Expand Up @@ -245,7 +245,7 @@ manifest:
groups:
- hal
- name: hal_stm32
revision: 468e5ad450a75d4baa3eed80e4f77a7700b71203
revision: pull/293/head
path: modules/hal/stm32
groups:
- hal
Expand Down