drivers: timer: nrf_rtc_timer: Allow use of custom bit width #92025
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Out of curiosity, what usecases are there for artificially lowering the counters bit widht? Only effect I can think of is more frequent wakeups to account for rollover, which would be worse for power consumption :) |
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Allowed use of counter bit width lower than hardware 24. In that case, PPI connection is established to trigger clear task once maximum value is reached. Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Added overlay for the board. Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
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Allowed use of counter bit width lower than hardware 24. In that case, PPI connection is established to trigger clear task once maximum value is reached.