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drivers: display: Introduce ST7565R #91320
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A node is needed in tests/drivers/build_all/display/app.overlay
to build controller code in CI.
drivers/display/display_st7565r.c
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* Copyright (c) 2025 Giyora Haroon | ||
* | ||
* This controller supports 8-bit parallel and 4-line SPI interfaces. | ||
* This implementation covers the SPI interface. |
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Not needed in the comment
drivers/display/display_st7565r.c
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/* Configure data_cmd pin if specified */ | ||
if (config->data_cmd.port && | ||
gpio_pin_configure_dt(&config->data_cmd, GPIO_OUTPUT_INACTIVE) < 0) { |
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Combine those statement with the previous one
drivers/display/display_st7565r.c
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{ | ||
const struct st7565r_config *config = dev->config; | ||
uint8_t zero_buf[config->width]; | ||
memset(zero_buf, 0, sizeof(zero_buf)); |
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can be combined with previous statement = {0}
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Width does come from a static value in the devicetree. However, since config->width is a runtime value, zero_buf is considered a variable length array, which can't be initialized with = {0}. I'll have to stick with the memset call here.
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Review comments needs to be resolved, not just marked as resolved.
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drivers/display/display_st7565r.h
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*/ | ||
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#ifndef ST7565R_H | ||
#define ST7565R_H |
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Needs full path for uniqueness reasons -- check other headers for the convention to follow
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I see two different conventions (1 from ssd1306_regs, 2 from display_st7735r):
- DISPLAY_ST7565R_H
- ST7565R_DISPLAY_DRIVER_H__
Which one should it be?
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_ZEPHYR_DRIVERS_DISPLAY_ST565R_H_
drivers/display/display_st7565r.c
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uint8_t zero_buf[ST7565R_MAX_WIDTH] = {0}; | ||
uint8_t col_cmds[2] = {ST7565R_SET_HIGHER_COL_ADDRESS_CMD, | ||
ST7565R_SET_LOWER_COL_ADDRESS_CMD}; | ||
const uint8_t num_pages = (config->height + 7) / 8; |
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You might want to set ST7565R_MAX_HEIGHT to 64 or carefully review how you're handling the special "COMS" case.
I don't think the 65th line is meant to be used for displayable pixels anyway. This comment applies to multiple other places in the driver where you're treating page 8 improperly.
Datasheet says:
Page address 8 (D3, D2, D1, D0 = 1, 0, 0, 0) is a special RAM for icons, and only display data D0 is used.
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You are correct. Is setting ST7565R_MAX_HEIGHT to 64 acceptable? Maybe someone can add support for "COMS" in the future (my display doesn't support it).
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yeah that's perfectly reasonable IMO (see https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.h#L37)
drivers/display/display_st7565r.c
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if (pf == PIXEL_FORMAT_MONO10) { /* 1=black, 0=white */ | ||
cmd = ST7565R_SET_REVERSE_DISPLAY; | ||
} else if (pf == PIXEL_FORMAT_MONO01) { /* 0=black, 1=white */ | ||
cmd = ST7565R_SET_NORMAL_DISPLAY; | ||
} else { |
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Tested this again. My code correctly reflects the following "RAM -> LCD" mode:

Edit: I'm not sure what's going on, will debug more when I get a chance.
Edit 2: there was a bug in cfb, addressed lately in Cfb fixes #85893. My ncs workspace did not include this fix, and that was the issue. Working as expected now
GENMASK() review comment addressed.
Introduce support for Sitronix's ST7565R display controller. Tested on JHD12864 LCD display. Signed-off-by: Giyora Haroon <dev@giyorah.com>
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i believe my comments to date have been addressed - thanks!
Introduce support for Sitronix's ST7565R display controller.
Tested on JHD12864 LCD display.