Add support for TI's MSPM0L series

boards/ti/lp_mspm0l2228/Kconfig.lp_mspm0l2228

@@ -0,0 +1,5 @@
+# Copyright (c) 2024 Texas Instruments
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_LP_MSPM0L2228
+	select SOC_MSPM0L2228

boards/ti/lp_mspm0l2228/board.cmake

@@ -0,0 +1,5 @@
+# # SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=MSPM0L2228" "--speed=4000")
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/ti/lp_mspm0l2228/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: lp_mspm0l2228
+  full_name: MSPM0L2228 Launchpad
+  vendor: ti
+  socs:
+    - name: mspm0l2228

boards/ti/lp_mspm0l2228/docs/index.rst

@@ -0,0 +1,140 @@
+.. zephyr:board:: lp_mspm0l2228
+
+Overview
+********
+
+MSPM0Lx22x microcontrollers (MCUs) are part of the highly integrated, ultra-low-power 32-bit MSPM0 MCU
+family based on the Arm® Cortex®-M0+ 32-bit core platform, operating at up to 32MHz frequency. These
+MCUs offer a blend of cost optimization and design flexibility for applications requiring 128KB to 256KB of
+flash memory in small packages (down to 4mm x 4mm) or high pin count packages (up to 80 pins). These
+devices include a VBAT backup island, an optional segmented LCD controller (on MSPM0L222x), cybersecurity
+enablers, and high-performance integrated analog, and provide excellent low-power performance across the
+operating temperature range.
+
+Up to 256KB of embedded flash program memory with built-in error correction code (ECC) and up to 32KB
+SRAM with ECC and parity protection is provided. The flash memory is organized into two main banks to support
+field firmware updates, with address swap support provided between the two main banks. An additional 32-byte
+backup memory is provided in the VBAT island, supplied by the VBAT pin and retained even when the main
+supply (VDD) is lost.
+
+Hardware
+********
+
+Launchpad MSPM0L2228 provides the following hardware components:
+
+- MSPM0L2228TPN SoC
+- ARM |reg| 32-bit Cortex |reg|-M0+ CPU
+- 32 MHz max CPU frequency
+- VDD from 1.62 V to 3.6 V
+- 256 KB Flash
+- 32 KB SRAM with ECC or parity
+- GPIO with external interrupt capability
+- 12-bit ADC with 26 channels
+- RTC
+- Six timers supporting up to 18 PWM outputs
+- Watchdog Timers (2)
+- UART (5)
+- I2C (2)
+- SPI (2)
+- DMA Controller
+
+.. image:: img/LP-MSPM0L2228.png
+     :align: center
+     :alt: MSPM0L2228 LaunchPad development board
+
+Zephyr uses the ``lp_mspm0l2228`` board for building LP_MSPM0L2228
+
+Features:
+*********
+
+- Onboard XDS110 debug probe
+- EnergyTrace technology available for ultra-low-power debugging
+- 2 buttons, 1 LED and 1 RGB LED for user interaction
+- Temperature sensor circuit
+- Light sensor circuit
+- External OPA2365 (default buffer mode) for ADC (up to 4 Msps) evaluation
+- Onboard 32.768-kHz and 40-MHz crystals
+- RC filter for ADC input (unpopulated by default)
+
+Details on the MSPM0L2228 LaunchPad can be found on the `TI LP_MSPM0L2228 Product Page`_.
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Building and Flashing
+*********************
+
+Building
+========
+
+Follow the :ref:`getting_started` instructions for Zephyr application development.
+
+For example, to build the blinky application for the MSPM0L2228 LaunchPad:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: lp_mspm0l2228
+   :goals: build
+
+The resulting ``zephyr.bin`` binary in the build directory can be flashed onto
+MSPM0L2228 LaunchPad using the steps mentioned below.
+
+Flashing
+========
+
+Open OCD is used to program the flash memory on the devices. It may be necessary in
+earlier versions to use a branch of open OCD onto the device.
+
+Before OpenOCD is public, one can clone `This Repo <https://github.com/openocd-org/openocd.git>`_,
+and then this can be built with
+
+.. code-block:: console
+
+   $ cd <cloned_OPENOCD_dir>
+   $ ./bootstrap (when building from the git repository)
+   $ ./configure
+   $ make
+   $ sudo make install
+
+Then after the build, it is possible to flash the device by passing additional arguments to the flash command
+
+.. code-block:: console
+
+   $ west flash --openocd <path to cloned dir>/src/openocd --openocd-search <path to cloned dir>/tcl
+
+Flashing using JLINK
+
+.. code-block:: console
+
+   $ west flash --runner jlink
+
+Debugging
+=========
+
+You can debug an application in the usual way. Here is an example for the
+:zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: lp_mspm0l2228
+   :goals: debug
+
+References
+**********
+
+TI MSPM0 MCU Page:
+   https://www.ti.com/microcontrollers-mcus-processors/arm-based-microcontrollers/arm-cortex-m0-mcus/overview.html
+
+TI MSPM0L2228 Product Page:
+   https://www.ti.com/product/MSPM0L2228
+
+TI MSPM0 SDK:
+   https://www.ti.com/tool/MSPM0-SDK
+
+.. _MSPM0L2228 TRM:
+   https://www.ti.com/lit/slau847
+
+.. _TI LP_MSPM0L2228 Product Page:
+   https://www.ti.com/tool/LP-MSPM0L2228

boards/ti/lp_mspm0l2228/lp_mspm0l2228.dts

@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2025 Texas Instruments
+ * Copyright (c) 2025 Linumiz GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <ti/mspm0/l/mspm0l2228.dtsi>
+#include <ti/mspm0/l/mspm0l222x-pinctrl.dtsi>
+#include <zephyr/dt-bindings/clock/mspm0_clock.h>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "TI LP_MSPM0L2228/MSPM0L2228";
+	compatible = "ti,mspm0l2228";
+
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,code-partition = &slot0_partition;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0: led_0 {
+			gpios = <&gpiob 10 GPIO_ACTIVE_HIGH>;
+			label = "RED LED";
+		};
+
+		led1: led_1 {
+			gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>;
+			label = "Green LED";
+		};
+	};
+};
+
+&flash0 {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0x8000>;
+		};
+
+		slot0_partition: partition@8000 {
+			label = "image-0";
+			reg = <0x00008000 0x1c000>;
+		};
+
+		slot1_partition: partition@24000 {
+			label = "image-1";
+			reg = <0x00024000 0x1c000>;
+		};
+	};
+};
+
+&pinctrl {
+	status = "okay";
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+};
+
+&gpioc {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_tx_pa10 &uart0_rx_pa11>;
+	pinctrl-names = "default";
+};

boards/ti/lp_mspm0l2228/lp_mspm0l2228.yaml

@@ -0,0 +1,15 @@
+identifier: lp_mspm0l2228
+name: TI MSPM0L2228 Launchpad
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 32
+flash: 256
+supported:
+  - gpio
+  - pinctrl
+  - uart
+vendor: ti

boards/ti/lp_mspm0l2228/lp_mspm0l2228_defconfig

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable uart driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_CLOCK_CONTROL=y

boards/ti/lp_mspm0l2228/support/openocd.cfg

@@ -0,0 +1,4 @@
+source [find interface/xds110.cfg]
+adapter speed 10000
+
+source [find target/ti_mspm0.cfg]

drivers/clock_control/clock_control_mspm0.c

@@ -152,7 +152,9 @@ static int clock_mspm0_init(const struct device *dev)
 	DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
 
 	DL_SYSCTL_setMCLKDivider(mspm0_mclk_cfg.clk_div);
+#if DT_NODE_HAS_PROP(DT_NODELABEL(ulpclk), clk_div)
 	DL_SYSCTL_setULPCLKDivider(mspm0_ulpclk_cfg.clk_div);
+#endif
 
 #if MSPM0_PLL_ENABLED
 #if DT_SAME_NODE(DT_HSCLK_CLOCKS_CTRL, DT_NODELABEL(syspll0))