clock_control: stm32: mp13: add plls / mco & clock source selection #89773
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| @@ -49,6 +49,11 @@ static int stm32_mco_init(const struct device *dev) | |||
| STM32_DT_CLKSEL_VAL_GET(pclken->enr) << | |||
| STM32_DT_CLKSEL_SHIFT_GET(pclken->enr)); | |||
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| #if defined(MCO_ENABLE_BIT) | |||
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nitpicking
what about naming it MCOX_ON as it is referenced as MCO1ON/MCO2ON in data sheet
| @@ -28,6 +28,13 @@ description: | | |||
| than 1000 MHz or program the mpuss_ck mux to use the MPUDIV | |||
| (refer to the stm32mp13 reference manual for details) | |||
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| div-m, div-p, div-q, div-r valid ranges are identicals for all 4 PLLs | |||
| mul-n valid range depends on the PLL | |||
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I would use here the Name defined in stm32mp13 reference manual but also in formula above
DIVM1, DIVP, DIVQ and DIVR have identical valid ranges for all 4 PLLs.
DIVN valid range depends on the PLL
or use aka as below
div-m (aka DIVM1) , div-p (aka DIVP), div-q (aka DIVQ), div-r (aka DIVR) have identical valid ranges for all 4 PLLs.
mul-n (aka DIVN) valid range depends on the PLL
On STM32MP13, a dedicated MCO enable bit within the MCO clock control register must be set in order to activate the MCO. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
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| ARG_UNUSED(dev); | ||
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| if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == true) { |
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Nitpicking; if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX)) is enough.
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Depending on the PLL, all DIV-P / DIV-Q and DIV-R are available on STM32MP13 PLLs. Adjust valid range in order to be able to set for all 4 PLLs. Clarify DT properties description. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Rename the frac-v PLL binding into fracn in order to make it consistent with other STM32 PLL bindings. This commit also correct the range which should be 0 - 8191. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Add enabled_clock, on / off and configure support for the clocks of the stm32mp13. Describes the peripheral clock source selection. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The stm32mp13 has 2 MCOs and 4 PLLs available. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
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This PR adds support for PLL2 / PLL3 / PLL4 of the stm32mp13 as well as MCO1 and MCO2.
Peripheral clock selection code is as well added.
This work is done in order to allow usage of the DCMIPP (camera pipeline) PR #89407 / ST-MIPID02 PR #89764 on the stm32mp135f-dk board.