@@ -199,7 +199,6 @@ static const struct gc2145_reg default_regs[] = {
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{0xa2 , 0x00 },
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/* BLK Settings */
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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{0x40 , 0x42 },
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{0x41 , 0x00 },
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{0x43 , 0x5b },
@@ -232,7 +231,6 @@ static const struct gc2145_reg default_regs[] = {
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{0x48 , 0x15 },
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{0x49 , 0x00 },
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{0x4b , 0x0b },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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/* AEC Settings */
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{GC2145_REG_RESET , GC2145_REG_RESET_P1_REGS },
@@ -275,8 +273,6 @@ static const struct gc2145_reg default_regs[] = {
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{0x95 , 0x84 },
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{0x97 , 0x65 },
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{0xa2 , 0x11 },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P2_REGS },
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{0x80 , 0xc1 },
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{0x81 , 0x08 },
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{0x82 , 0x05 },
@@ -306,10 +302,7 @@ static const struct gc2145_reg default_regs[] = {
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{0x3d , 0x15 },
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{0x4b , 0x06 },
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{0x4c , 0x20 },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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-
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/* Gamma Control */
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- {GC2145_REG_RESET , GC2145_REG_RESET_P2_REGS },
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{0x10 , 0x09 },
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{0x11 , 0x0d },
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{0x12 , 0x13 },
@@ -358,7 +351,6 @@ static const struct gc2145_reg default_regs[] = {
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{0x39 , 0xf3 },
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{0x3a , 0xf9 },
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{0x3b , 0xff },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P2_REGS },
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{0xd1 , 0x32 },
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{0xd2 , 0x32 },
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{0xd3 , 0x40 },
@@ -373,7 +365,6 @@ static const struct gc2145_reg default_regs[] = {
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{0xd8 , 0xd8 },
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{GC2145_REG_RESET , GC2145_REG_RESET_P1_REGS },
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{0x9f , 0x40 },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P1_REGS },
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{0xc2 , 0x14 },
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{0xc3 , 0x0d },
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{0xc4 , 0x0c },
@@ -430,8 +421,6 @@ static const struct gc2145_reg default_regs[] = {
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{0xa9 , 0x77 },
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{0xa1 , 0x80 },
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{0xa2 , 0x80 },
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-
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- {GC2145_REG_RESET , GC2145_REG_RESET_P1_REGS },
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{0xdf , 0x0d },
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{0xdc , 0x25 },
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{0xdd , 0x30 },
@@ -443,13 +432,10 @@ static const struct gc2145_reg default_regs[] = {
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{0xe7 , 0xa0 },
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{0xe8 , 0x90 },
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{0xe9 , 0xa0 },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P1_REGS },
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{0x4f , 0x00 },
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{0x4f , 0x00 },
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{0x4b , 0x01 },
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{0x4f , 0x00 },
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-
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{0x4c , 0x01 },
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{0x4d , 0x71 },
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{0x4e , 0x01 },
@@ -684,7 +670,6 @@ static const struct gc2145_reg default_regs[] = {
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{0x79 , 0x5e },
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{0x7a , 0x54 },
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{0x7b , 0x58 },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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{GC2145_REG_RESET , GC2145_REG_RESET_P2_REGS },
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{0xc0 , 0x01 },
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{0xc1 , 0x44 },
@@ -707,13 +692,11 @@ static const struct gc2145_reg default_regs[] = {
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{0xe5 , 0xe0 },
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{GC2145_REG_RESET , GC2145_REG_RESET_P1_REGS },
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{0x9f , 0x40 },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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/* Output Control */
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{GC2145_REG_RESET , GC2145_REG_RESET_P2_REGS },
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{0x40 , 0xbf },
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{0x46 , 0xcf },
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- {GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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{GC2145_REG_RESET , GC2145_REG_RESET_P0_REGS },
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{0x05 , 0x01 },
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