drivers: clock_control_mcux_ccm_rev2: add SAR_ADC clock support

Added SAR_ADC clock support for clock_control_mcux_ccm_rev2

Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>

Author: ZhaoQiang-b45475

drivers/clock_control/clock_control_mcux_ccm_rev2.c

@@ -263,6 +263,12 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
 		break;
 #endif
 
+#ifdef CONFIG_ADC_MCUX_SAR_ADC
+	case IMX_CCM_SAR_ADC1_CLK:
+		clock_root = kCLOCK_Root_Adc + instance;
+		break;
+#endif
+
 #if defined(CONFIG_ETH_NXP_IMX_NETC)
 	case IMX_CCM_NETC_CLK:
 		clock_root = kCLOCK_Root_Netc;

include/zephyr/dt-bindings/clock/imx_ccm_rev2.h

@@ -1,5 +1,5 @@
 /*
- * Copyright 2021,2024 NXP
+ * Copyright 2021,2024-2025 NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -121,6 +121,7 @@
 /* ADC */
 #define IMX_CCM_LPADC1_CLK             0x1500UL
 #define IMX_CCM_LPADC2_CLK             0x1501UL
+#define IMX_CCM_SAR_ADC1_CLK           0x1500UL
 
 /* TPM */
 #define IMX_CCM_TPM_CLK                0x1600UL