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Marek Matejkartben
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soc: esp32s3: update APPCPU code
Updates for AMP targets - use common AMP Kconfig - update APPCPU linker script - place AMP common area in the reserved space Signed-off-by: Marek Matej <marek.matej@espressif.com>
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8 files changed

+50
-103
lines changed

8 files changed

+50
-103
lines changed

soc/espressif/esp32s3/CMakeLists.txt

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,8 @@ if(CONFIG_ESP_SIMPLE_BOOT OR CONFIG_MCUBOOT)
6666

6767
endif()
6868

69+
set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
70+
6971
# Select the image origin depending on the boot configuration
7072
if(CONFIG_SOC_ESP32S3_APPCPU)
7173
dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition")
@@ -91,10 +93,10 @@ if(CONFIG_MCUBOOT)
9193
${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
9294
ARGS
9395
--rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
94-
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
96+
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
9597
find-refs
96-
--from-section='.iram0.loader_text'
97-
--to-section='.iram0.text'
98+
--from-section='.iram0.loader_text'
99+
--to-section='.iram0.text'
98100
--exit-code)
99101
endif()
100102

soc/espressif/esp32s3/Kconfig

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,4 @@ config MAC_BB_PD
156156

157157
endmenu # Cache config
158158

159-
rsource "Kconfig.amp"
160-
161159
endif # SOC_SERIES_ESP32S3

soc/espressif/esp32s3/Kconfig.amp

Lines changed: 0 additions & 31 deletions
This file was deleted.

soc/espressif/esp32s3/default.ld

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,8 @@
1111
#include "memory.h"
1212

1313
/* User available SRAM memory segments */
14-
amp_total_size = APPCPU_SRAM_TOTAL_SIZE;
15-
procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_TOTAL_SIZE;
16-
procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_TOTAL_SIZE;
14+
procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_SIZE;
15+
procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_SIZE;
1716

1817
procpu_iram_org = SRAM_USER_IRAM_START;
1918
procpu_iram_len = procpu_iram_end - procpu_iram_org;
@@ -237,7 +236,6 @@ SECTIONS
237236
/* Send .iram0 code to iram */
238237
.iram0.vectors : ALIGN(4)
239238
{
240-
_iram_start = ABSOLUTE(.);
241239
/* Vectors go to IRAM */
242240
_init_start = ABSOLUTE(.);
243241
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
@@ -271,9 +269,9 @@ SECTIONS
271269
*(.entry.text)
272270
*(.init.literal)
273271
*(.init)
274-
275272
_init_end = ABSOLUTE(.);
276273

274+
_iram_start = ABSOLUTE(.);
277275
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
278276

279277
.iram0.text : ALIGN(4)
@@ -745,7 +743,7 @@ SECTIONS
745743
} GROUP_LINK_IN(RAMABLE_REGION)
746744

747745
/* Provide total SRAM usage, including IRAM and DRAM */
748-
_image_ram_start = _iram_start - IRAM_DRAM_OFFSET;
746+
_image_ram_start = _init_start - IRAM_DRAM_OFFSET;
749747
#include <zephyr/linker/ram-end.ld>
750748

751749
ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")

soc/espressif/esp32s3/default_appcpu.ld

Lines changed: 27 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,10 @@
88
#include <zephyr/linker/linker-defs.h>
99
#include <zephyr/linker/linker-tool.h>
1010

11+
#if !defined(CONFIG_BOOTLOADER_MCUBOOT)
12+
#error "APPCPU image must use MCUboot image format."
13+
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
14+
1115
#include "memory.h"
1216

1317
/* User available SRAM memory segments */
@@ -47,15 +51,9 @@ appcpu_dram_len = APPCPU_SRAM_SIZE;
4751

4852
MEMORY
4953
{
50-
#ifdef CONFIG_BOOTLOADER_MCUBOOT
5154
mcuboot_hdr (R): org = 0x0, len = 0x20
5255
metadata (R): org = 0x20, len = 0x20
5356
FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40
54-
#else
55-
/* Make safety margin in the FLASH memory size so the
56-
* (esp_img_header + (n*esp_seg_headers)) would fit */
57-
FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100
58-
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
5957

6058
iram0_1_seg(RX): org = appcpu_iram_org, len = appcpu_iram_len
6159
dram0_1_seg(RW): org = appcpu_dram_org, len = appcpu_dram_len
@@ -73,7 +71,6 @@ _heap_sentry = DRAM_RESERVED_START;
7371

7472
SECTIONS
7573
{
76-
#if defined(CONFIG_BOOTLOADER_MCUBOOT)
7774
/* Reserve space for MCUboot header in the binary */
7875
.mcuboot_header :
7976
{
@@ -109,20 +106,18 @@ SECTIONS
109106
LONG(LOADADDR(.dram0.data))
110107
LONG(_data_end - _data_start)
111108
} > metadata
112-
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
113109

114110
#include <zephyr/linker/rel-sections.ld>
115111

116-
#ifdef CONFIG_LLEXT
112+
#ifdef CONFIG_LLEXT
117113
#include <zephyr/linker/llext-sections.ld>
118-
#endif
114+
#endif
119115

120116
/* --- START OF IRAM --- */
121117

122118
/* Send .iram0 code to iram */
123119
.iram0.vectors : ALIGN(4)
124120
{
125-
_iram_start = ABSOLUTE(.);
126121
/* Vectors go to IRAM */
127122
_init_start = ABSOLUTE(.);
128123
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
@@ -156,10 +151,9 @@ SECTIONS
156151
*(.entry.text)
157152
*(.init.literal)
158153
*(.init)
159-
. = ALIGN (16);
160-
161154
_init_end = ABSOLUTE(.);
162155

156+
_iram_start = ABSOLUTE(.);
163157
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
164158

165159
.iram0.text : ALIGN(4)
@@ -290,7 +284,6 @@ SECTIONS
290284
#include <zephyr/linker/kobject-data.ld>
291285
#include <zephyr/linker/common-rom/common-rom-logging.ld>
292286

293-
/* SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) */
294287
.dram0.rodata : ALIGN(4)
295288
{
296289
_rodata_start = ABSOLUTE(.);
@@ -304,26 +297,26 @@ SECTIONS
304297

305298
. = ALIGN(4);
306299
*(EXCLUDE_FILE (
307-
*libarch__xtensa__core.a:*
308-
*libkernel.a:fatal.*
309-
*libkernel.a:init.*
310-
*libzephyr.a:cbprintf_complete*
311-
*libzephyr.a:log_core.*
312-
*libzephyr.a:log_backend_uart.*
313-
*libzephyr.a:log_output.*
314-
*libzephyr.a:loader.*
315-
*libdrivers__serial.a:uart_esp32.*) .rodata)
300+
*libarch__xtensa__core.a:*
301+
*libkernel.a:fatal.*
302+
*libkernel.a:init.*
303+
*libzephyr.a:cbprintf_complete*
304+
*libzephyr.a:log_core.*
305+
*libzephyr.a:log_backend_uart.*
306+
*libzephyr.a:log_output.*
307+
*libzephyr.a:loader.*
308+
*libdrivers__serial.a:uart_esp32.*) .rodata)
316309

317310
*(EXCLUDE_FILE (
318-
*libarch__xtensa__core.a:*
319-
*libkernel.a:fatal.*
320-
*libkernel.a:init.*
321-
*libzephyr.a:cbprintf_complete*
322-
*libzephyr.a:log_core.*
323-
*libzephyr.a:log_backend_uart.*
324-
*libzephyr.a:log_output.*
325-
*libzephyr.a:loader.*
326-
*libdrivers__serial.a:uart_esp32.*) .rodata.*)
311+
*libarch__xtensa__core.a:*
312+
*libkernel.a:fatal.*
313+
*libkernel.a:init.*
314+
*libzephyr.a:cbprintf_complete*
315+
*libzephyr.a:log_core.*
316+
*libzephyr.a:log_backend_uart.*
317+
*libzephyr.a:log_output.*
318+
*libzephyr.a:loader.*
319+
*libdrivers__serial.a:uart_esp32.*) .rodata.*)
327320

328321
. = ALIGN(4);
329322

@@ -371,10 +364,6 @@ SECTIONS
371364

372365
/* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA.
373366
* Executing directly from LMA is not possible. */
374-
#pragma push_macro("GROUP_ROM_LINK_IN")
375-
#undef GROUP_ROM_LINK_IN
376-
#define GROUP_ROM_LINK_IN(vregion, lregion) > RAMABLE_REGION AT > lregion
377-
378367
#include <zephyr/linker/cplusplus-rom.ld>
379368
#include <zephyr/linker/common-rom/common-rom-init.ld>
380369
#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
@@ -386,18 +375,14 @@ SECTIONS
386375
#include <zephyr/linker/thread-local-storage.ld>
387376
#include <snippets-sections.ld>
388377

389-
#pragma pop_macro("GROUP_ROM_LINK_IN")
390-
391378
/* Create an explicit section at the end of all the data that shall be mapped into drom.
392379
* This is used to calculate the size of the _image_drom_size variable */
393-
/* SECTION_PROLOGUE(_RODATA_SECTION_END,,) */
394-
.dram0.rodata_end : ALIGN(0x10)
380+
.dram0.rodata_end : ALIGN(16)
395381
{
396382
. = ALIGN(16);
397383
_image_rodata_end = ABSOLUTE(.);
398384
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
399385

400-
401386
.dram0.end :
402387
{
403388
__data_end = ABSOLUTE(.);
@@ -438,19 +423,13 @@ SECTIONS
438423
} GROUP_LINK_IN(RAMABLE_REGION)
439424

440425
/* Provide total SRAM usage, including IRAM and DRAM */
441-
_image_ram_start = _iram_start - IRAM_DRAM_OFFSET;
426+
_image_ram_start = _init_start - IRAM_DRAM_OFFSET;
442427
#include <zephyr/linker/ram-end.ld>
443428

444429
ASSERT(((__bss_end - ORIGIN(dram0_1_seg)) <= LENGTH(dram0_1_seg)), "DRAM segment data does not fit.")
445430

446431
/* --- END OF DRAM --- */
447432

448-
/* --- START OF IROM --- */
449-
/* --- END OF IROM --- */
450-
451-
/* --- START OF DROM --- */
452-
/* --- END OF DROM --- */
453-
454433
#ifdef CONFIG_GEN_ISR_TABLES
455434
#include <zephyr/linker/intlist.ld>
456435
#endif

soc/espressif/esp32s3/esp32s3-mp.c

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include "esp_mcuboot_image.h"
1919
#include "esp_memory_utils.h"
2020

21+
/* AMP support */
2122
#ifdef CONFIG_SOC_ENABLE_APPCPU
2223

2324
#include "bootloader_flash_priv.h"
@@ -66,17 +67,13 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
6667
const uint32_t img_off = FIXED_PARTITION_OFFSET(slot0_appcpu_partition);
6768
const uint32_t fa_size = FIXED_PARTITION_SIZE(slot0_appcpu_partition);
6869
const uint8_t fa_id = FIXED_PARTITION_ID(slot0_appcpu_partition);
69-
int rc = 0;
7070

7171
if (entry_addr == NULL) {
7272
ets_printf("Can't return the entry address. Aborting!\n");
7373
abort();
7474
return -1;
7575
}
7676

77-
ets_printf("Loading appcpu image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n",
78-
fa_id, img_off, hdr_offset, fa_size / 1024);
79-
8077
uint32_t mcuboot_header[8] = {0};
8178
esp_image_load_header_t image_header = {0};
8279

@@ -89,7 +86,8 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
8986
sys_munmap(data);
9087

9188
if (image_header.header_magic == ESP_LOAD_HEADER_MAGIC) {
92-
ets_printf("MCUboot image format\n");
89+
ets_printf("APPCPU image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n",
90+
fa_id, img_off, hdr_offset, fa_size / 1024);
9391
} else if ((image_header.header_magic & 0xff) == 0xE9) {
9492
ets_printf("ESP image format is not supported\n");
9593
abort();
@@ -130,13 +128,13 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
130128
load_segment(img_off + image_header.dram_flash_offset, image_header.dram_size,
131129
image_header.dram_dest_addr);
132130

133-
ets_printf("Application start=%xh\n", image_header.entry_addr);
131+
ets_printf("Application start=%xh\n\n", image_header.entry_addr);
134132
esp_rom_uart_tx_wait_idle(0);
135133

136134
assert(entry_addr != NULL);
137135
*entry_addr = image_header.entry_addr;
138136

139-
return rc;
137+
return 0;
140138
}
141139

142140
void esp_appcpu_image_stop(void)

soc/espressif/esp32s3/memory.h

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@
6868
* and it should not be overlapped by the user image.
6969
* When there is no 2nd stage bootloader the bootstrapping is done
7070
* by the so-called SIMPLE_BOOT.
71+
* NOTE: AMP is supported only if MCUboot is enabled.
7172
*/
7273
#ifdef CONFIG_ESP_SIMPLE_BOOT
7374
#define USER_DRAM_END BOOTLOADER_USER_DRAM_END
@@ -78,17 +79,19 @@
7879

7980
/* AMP */
8081
#if defined(CONFIG_SOC_ENABLE_APPCPU) || defined(CONFIG_SOC_ESP32S3_APPCPU)
81-
#define APPCPU_IRAM_SIZE CONFIG_ESP32S3_APPCPU_IRAM_SIZE
82-
#define APPCPU_DRAM_SIZE CONFIG_ESP32S3_APPCPU_DRAM_SIZE
83-
#define AMP_COMM_SIZE (0x4000 + 0x400)
82+
#define APPCPU_IRAM_SIZE CONFIG_ESP_APPCPU_IRAM_SIZE
83+
#define APPCPU_DRAM_SIZE CONFIG_ESP_APPCPU_DRAM_SIZE
84+
#define AMP_COMM_SIZE DT_REG_SIZE(DT_NODELABEL(ipmmem0)) + DT_REG_SIZE(DT_NODELABEL(shm0)) + \
85+
DT_REG_SIZE(DT_NODELABEL(ipm0)) + DT_REG_SIZE(DT_NODELABEL(mbox0))
86+
#undef DRAM_RESERVED_START
87+
#define DRAM_RESERVED_START 0x3fce5000
8488
#else
8589
#define APPCPU_IRAM_SIZE 0
8690
#define APPCPU_DRAM_SIZE 0
8791
#define AMP_COMM_SIZE 0
8892
#endif
8993

90-
#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE)
91-
#define APPCPU_SRAM_TOTAL_SIZE (APPCPU_SRAM_SIZE + AMP_COMM_SIZE)
94+
#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE)
9295

9396
/* Flash */
9497
#ifdef CONFIG_FLASH_SIZE

soc/espressif/esp32s3/soc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -176,5 +176,5 @@ void sys_arch_reboot(int type)
176176

177177
#if defined(CONFIG_SOC_ENABLE_APPCPU) && !defined(CONFIG_MCUBOOT)
178178
extern int esp_appcpu_init(void);
179-
SYS_INIT(esp_appcpu_init, POST_KERNEL, 50);
179+
SYS_INIT(esp_appcpu_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
180180
#endif

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