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Marek Matejkartben
Marek Matej
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kartben
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soc: esp32: fixes and updates for AMP
Multiple AMP related updates: - use common AMP Kconfig - rework the APPCPU linker script - use MCUboot image format for APPCPU image - fix multi-processing startup code Signed-off-by: Marek Matej <marek.matej@espressif.com>
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-338
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12 files changed

+538
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‎soc/espressif/common/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,7 @@ config ESP32_PHY_MAX_TX_POWER
5858

5959
endif
6060

61+
rsource "Kconfig.amp"
6162
rsource "Kconfig.spiram"
6263
rsource "Kconfig.esptool"
6364
rsource "Kconfig.flash"

‎soc/espressif/common/Kconfig.amp

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_ENABLE_APPCPU
5+
bool
6+
default y
7+
depends on (IPM || MBOX)
8+
depends on SOC_SERIES_ESP32 || SOC_SERIES_ESP32S3
9+
help
10+
This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.
11+
12+
menu "Espressif AMP Config"
13+
14+
config ESP_APPCPU_IRAM_SIZE
15+
hex "ESP32* APPCPU IRAM size"
16+
default 0x10000
17+
help
18+
Defines APPCPU IRAM area size in bytes.
19+
20+
config ESP_APPCPU_DRAM_SIZE
21+
hex "ESP32* APPCPU DRAM size"
22+
default 0x10000
23+
help
24+
Defines APPCPU DRAM area size in bytes.
25+
26+
endmenu # AMP config

‎soc/espressif/common/loader.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,8 @@ void __start(void)
264264
}
265265
#endif
266266

267-
#if !defined(CONFIG_MCUBOOT) && !defined(CONFIG_SOC_ESP32S3_APPCPU)
267+
#if !defined(CONFIG_SOC_ESP32_APPCPU) && !defined(CONFIG_SOC_ESP32S3_APPCPU) && \
268+
!defined(CONFIG_MCUBOOT)
268269
map_rom_segments(_app_drom_start, _app_drom_vaddr, _app_drom_size, _app_irom_start,
269270
_app_irom_vaddr, _app_irom_size);
270271
#endif

‎soc/espressif/esp32/CMakeLists.txt

Lines changed: 37 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

33
if (CONFIG_SOC_ESP32_APPCPU)
4-
zephyr_sources(soc_appcpu.c)
4+
zephyr_sources(
5+
soc_appcpu.c
6+
)
57
else()
68
zephyr_sources(
79
soc.c
@@ -24,13 +26,24 @@ zephyr_library_sources_ifdef(CONFIG_POWEROFF poweroff.c)
2426
# get flash size to use in esptool as string
2527
math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")
2628

27-
# This includes CONFIG_MCUBOOT and CONFIG_ESP_SIMPLE_BOOT
28-
if(NOT CONFIG_BOOTLOADER_MCUBOOT)
29+
# Get UART baudrate from DT
30+
dt_chosen(dts_shell_uart PROPERTY "zephyr,shell-uart")
31+
if(${dts_shell_uart})
32+
dt_prop(monitor_baud PATH ${dts_shell_uart} PROPERTY "current-speed")
33+
endif()
34+
35+
board_runner_args(esp32 "--esp-monitor-baud=${monitor_baud}")
36+
37+
message("-- Espressif HAL path: ${ESP_IDF_PATH}")
38+
39+
# Select image processing
40+
41+
if(CONFIG_ESP_SIMPLE_BOOT OR CONFIG_MCUBOOT)
2942

3043
if(CONFIG_BUILD_OUTPUT_BIN)
3144

3245
set(ESPTOOL_PY ${ESP_IDF_PATH}/tools/esptool_py/esptool.py)
33-
message("esptool path: ${ESPTOOL_PY}")
46+
message("-- Use the esptool.py: ${ESPTOOL_PY}")
3447

3548
set(ELF2IMAGE_ARG "")
3649
if(NOT CONFIG_MCUBOOT)
@@ -39,56 +52,47 @@ if(NOT CONFIG_BOOTLOADER_MCUBOOT)
3952

4053
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
4154
COMMAND ${PYTHON_EXECUTABLE} ${ESPTOOL_PY}
42-
ARGS --chip esp32 elf2image ${ELF2IMAGE_ARG}
55+
ARGS --chip ${CONFIG_SOC} elf2image ${ELF2IMAGE_ARG}
4356
--flash_mode dio --flash_freq 40m
4457
--flash_size ${esptoolpy_flashsize}MB
4558
-o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
4659
${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
47-
endif()
48-
49-
endif()
50-
51-
## When building for APPCPU
52-
if (CONFIG_SOC_ESP32_APPCPU)
5360

54-
if(CONFIG_BUILD_OUTPUT_BIN)
55-
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
56-
COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/esp_bin2c_array.py
57-
ARGS -i ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
58-
-o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.c
59-
-a "esp32_appcpu_fw_array")
6061
endif()
6162

62-
else()
63+
endif()
6364

64-
set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
65+
set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
6566

66-
# get code-partition boot address
67+
# Select the image origin depending on the boot configuration
68+
if(CONFIG_SOC_ESP32_APPCPU)
69+
dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition")
70+
elseif(CONFIG_MCUBOOT)
6771
dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
68-
dt_reg_addr(boot_off PATH ${dts_partition_path})
69-
70-
# get code-partition slot0 address
72+
elseif(CONFIG_ESP_SIMPLE_BOOT)
73+
dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
74+
else()
7175
dt_nodelabel(dts_partition_path NODELABEL "slot0_partition")
72-
dt_reg_addr(img_0_off PATH ${dts_partition_path})
76+
endif()
7377

74-
if(CONFIG_BOOTLOADER_MCUBOOT)
75-
board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}")
76-
else()
77-
board_finalize_runner_args(esp32 "--esp-app-address=${boot_off}")
78-
endif()
78+
dt_reg_addr(image_off PATH ${dts_partition_path})
79+
board_finalize_runner_args(esp32 "--esp-app-address=${image_off}")
7980

80-
endif()
81+
message("-- Image partition ${dts_partition_path}")
8182

83+
# Look for cross references between bootloader sections
8284
if(CONFIG_MCUBOOT)
83-
# search from cross references between bootloader sections
85+
8486
message("check_callgraph using: ${ESP_IDF_PATH}/tools/ci/check_callgraph.py")
8587
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
8688
COMMAND
8789
${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
8890
ARGS
8991
--rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
90-
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
91-
find-refs --from-section=.iram0.iram_loader --to-section=.iram0.text
92+
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
93+
find-refs
94+
--from-section='.iram0.loader_text'
95+
--to-section='.iram0.text'
9296
--exit-code)
9397
endif()
9498

‎soc/espressif/esp32/Kconfig

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -15,27 +15,6 @@ config SOC_SERIES_ESP32
1515

1616
if SOC_SERIES_ESP32
1717

18-
config ESP32_APPCPU_IRAM
19-
hex "ESP32 APPCPU IRAM size"
20-
depends on SOC_ESP32_PROCPU || SOC_ESP32_APPCPU
21-
default 0x20000
22-
help
23-
Defines APPCPU IRAM area in bytes.
24-
25-
config ESP32_APPCPU_DRAM
26-
hex "ESP32 APPCPU DRAM size"
27-
depends on SOC_ESP32_PROCPU || SOC_ESP32_APPCPU
28-
default 0x10000
29-
help
30-
Defines APPCPU DRAM area in bytes.
31-
32-
config SOC_ENABLE_APPCPU
33-
bool
34-
default y
35-
depends on (IPM || MBOX) && SOC_ESP32_PROCPU
36-
help
37-
This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.
38-
3918
config ESP32_BT_RESERVE_DRAM
4019
hex "Bluetooth controller reserved RAM region"
4120
default 0xdb5c if BT

‎soc/espressif/esp32/Kconfig.defconfig

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,9 @@ config FLASH_SIZE
99
config FLASH_BASE_ADDRESS
1010
default $(dt_node_reg_addr_hex,/soc/flash-controller@3ff42000/flash@0)
1111

12+
config BOOTLOADER_MCUBOOT
13+
default y if SOC_ESP32_APPCPU
14+
1215
if SMP
1316

1417
config SCHED_IPI_SUPPORTED

‎soc/espressif/esp32/default.ld

Lines changed: 13 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -12,19 +12,15 @@
1212

1313
#include "memory.h"
1414

15-
/* The "user_iram_end" represents the last DRAM memory location
16-
* that is occupied by the ROM code. Since the "iram_loader_seg"
17-
* - which is the last memory the bootloader runs from - resides
18-
* in the SRAM0 "cache" memory, the "user_iram_end" applies for\
19-
* all build cases - Simple boot and the MCUboot application.
20-
*/
21-
user_iram_end = SRAM1_DRAM_IRAM_CALC(SRAM1_DRAM_USER_START);
22-
2315
/* User available SRAM memory segments */
24-
user_iram_seg_org = (SRAM0_IRAM_START + SRAM0_CACHE_SIZE);
25-
user_iram_seg_len = user_iram_end - user_iram_seg_org;
26-
user_dram_seg_org = SRAM2_DRAM_USER_START;
27-
user_dram_seg_len = SRAM2_DRAM_USER_SIZE;
16+
procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_SIZE;
17+
procpu_iram_org = SRAM0_IRAM_START + SRAM0_CACHE_SIZE;
18+
procpu_iram_len = procpu_iram_end - procpu_iram_org;
19+
20+
procpu_dram_end = SRAM2_DRAM_END;
21+
procpu_dram_org = SRAM2_DRAM_USER_START + CONFIG_ESP32_BT_RESERVE_DRAM;
22+
procpu_dram_len = SRAM2_DRAM_USER_SIZE - CONFIG_ESP32_BT_RESERVE_DRAM;
23+
2824
user_dram_2_seg_org = SRAM1_DRAM_USER_START;
2925
user_dram_2_seg_len = SRAM1_USER_SIZE;
3026

@@ -36,12 +32,6 @@ user_dram_2_seg_len = SRAM1_USER_SIZE;
3632
#define RAMABLE_REGION dram0_0_seg
3733
#define ROMABLE_REGION FLASH
3834

39-
#ifndef CONFIG_SOC_ESP32_PROCPU
40-
#define RAMABLE_REGION_1 dram0_1_seg
41-
#else
42-
#define RAMABLE_REGION_1 dram0_0_seg
43-
#endif
44-
4535
#undef GROUP_DATA_LINK_IN
4636
#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion
4737

@@ -72,26 +62,8 @@ MEMORY
7262
FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100
7363
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
7464

75-
#ifndef CONFIG_SOC_ESP32_APPCPU
76-
iram0_0_seg(RX): org = user_iram_seg_org, len = user_iram_seg_len
77-
#else
78-
iram0_0_seg(RX): org = user_iram_seg_org, len = 0x8000
79-
#endif /* CONFIG_SOC_ESP32_APPCPU */
80-
81-
dram0_0_seg(RW): org = user_dram_seg_org + CONFIG_ESP32_BT_RESERVE_DRAM,
82-
len = user_dram_seg_len - CONFIG_ESP32_BT_RESERVE_DRAM
83-
84-
#ifdef CONFIG_SOC_ESP32_PROCPU
85-
/* shared RAM reserved for IPM */
86-
dram0_shm0_seg(RW): org = 0x3ffe5230, len = 2K
87-
/* shared data reserved for IPM data header */
88-
dram0_sem0_seg(RW): org = 0x3ffe5a30, len = 8
89-
/* for AMP builds dram0_1 is reserved for network core */
90-
dram0_1_seg(RW): org = 0x3ffe5a38, len = 0K
91-
#else
92-
/* skip data for APP CPU initialization usage */
93-
dram0_1_seg(RW): org = user_dram_2_seg_org, len = user_dram_2_seg_len
94-
#endif /* CONFIG_SOC_ESP32_PROCPU */
65+
iram0_0_seg(RX): org = procpu_iram_org, len = procpu_iram_len
66+
dram0_0_seg(RW): org = procpu_dram_org, len = procpu_dram_len
9567

9668
irom0_0_seg(RX): org = IROM_SEG_ORG, len = IROM_SEG_LEN
9769
drom0_0_seg(R): org = DROM_SEG_ORG, len = DROM_SEG_LEN
@@ -219,7 +191,6 @@ SECTIONS
219191

220192
.iram0.vectors : ALIGN(4)
221193
{
222-
_iram_start = ABSOLUTE(.);
223194
/* Vectors go to IRAM */
224195
_init_start = ABSOLUTE(.);
225196
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
@@ -253,6 +224,7 @@ SECTIONS
253224
*(.init.literal)
254225
*(.init)
255226
_init_end = ABSOLUTE(.);
227+
_iram_start = ABSOLUTE(.);
256228
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
257229

258230
.iram0.text : ALIGN(4)
@@ -712,12 +684,12 @@ SECTIONS
712684
*(.noinit)
713685
*(.noinit.*)
714686
. = ALIGN (8);
715-
} GROUP_LINK_IN(RAMABLE_REGION_1)
687+
} GROUP_LINK_IN(RAMABLE_REGION)
716688

717689
/* Provide total SRAM usage, including IRAM and DRAM */
718690
_image_ram_start = _dram_data_start;
719691
#include <zephyr/linker/ram-end.ld>
720-
_image_ram_size += _iram_end - _iram_start;
692+
_image_ram_size += _iram_end - _init_start;
721693

722694
ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM data does not fit.")
723695

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