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boards: nxp: Add FRDM_MCXW72
Add initial board for FRDM_MCXW72 Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
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‎boards/nxp/frdm_mcxw72/Kconfig.frdm_mcxw72

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# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_FRDM_MCXW72
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select SOC_MCXW727C_CPU0 if BOARD_FRDM_MCXW72_MCXW727C_CPU0
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select SOC_PART_NUMBER_MCXW727CMFTA

‎boards/nxp/frdm_mcxw72/board.cmake

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# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(linkserver "--device=MCXW727C:MCX-W72-EVK")
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board_runner_args(jlink "--device=MCXW727" "--reset-after-load")
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include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/nxp/frdm_mcxw72/board.yml

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board:
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name: frdm_mcxw72
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full_name: FRDM-MCXW72
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vendor: nxp
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socs:
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- name: mcxw727c

‎boards/nxp/frdm_mcxw72/doc/frdm_mcxw72.webp

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‎boards/nxp/frdm_mcxw72/doc/index.rst

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.. zephyr:board:: frdm_mcxw72
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Overview
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********
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The FRDM-MCXW72
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The MCX W72x family features a 96 MHz Arm® Cortex®-M33 core coupled with a
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multiprotocol radio subsystem supporting Matter, Thread, Zigbee and
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Bluetooth LE. The independent radio subsystem, with a dedicated core and
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memory, offloads the main CPU, preserving it for the primary application and
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allowing firmware updates to support future wireless standards.
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Hardware
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********
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- MCXW72 Arm Cortex-M33 microcontroller running up to 96 MHz
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- 2MB on-chip Flash memory unit
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- 256 KB TCM RAM
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- On-board MCU-Link debugger with CMSIS-DAP
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For more information about the MCXW72 SoC and FRDM-MCXW72 board, see:
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- `MCXW72 SoC Website`_
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- `FRDM-MCXW72 Website`_
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Supported Features
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==================
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The ``frdm_mcxw72`` board target in Zephyr currently supports the following features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinctrl |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| LPUART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| TPM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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| LPTMR | on-chip | counter |
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+-----------+------------+-------------------------------------+
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| LPSPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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| FLEXCAN | on-chip | can |
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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Programming and Debugging
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*************************
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Build and flash applications as usual (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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Configuring a Debug Probe
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=========================
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A debug probe is used for both flashing and debugging the board. This board is
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configured by default to use the MCU-Link CMSIS-DAP Onboard Debug Probe.
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Using LinkServer
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----------------
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Linkserver is the default runner for this board, and supports the factory
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default MCU-Link firmware. Follow the instructions in
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:ref:`mcu-link-cmsis-onboard-debug-probe` to reprogram the default MCU-Link
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firmware. This only needs to be done if the default onboard debug circuit
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firmware was changed. To put the board in ``DFU mode`` to program the firmware,
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short jumper JP5.
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Using J-Link
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------------
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There are two options. The onboard debug circuit can be updated with Segger
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J-Link firmware by following the instructions in
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:ref:`mcu-link-jlink-onboard-debug-probe`.
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To be able to program the firmware, you need to put the board in ``DFU mode``
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by shortening the jumper JP5.
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The second option is to attach a :ref:`jlink-external-debug-probe` to the
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10-pin SWD connector (J12) of the board.
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For both options use the ``-r jlink`` option with west to use the jlink runner.
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.. code-block:: console
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west flash -r jlink
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Configuring a Console
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=====================
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Connect a USB cable from your PC to J14, and use the serial terminal of your choice
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(minicom, putty, etc.) with the following settings:
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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Flashing
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========
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Here is an example for the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: frdm_mcxw72/mcxw727c/cpu0
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:goals: flash
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Open a serial terminal, reset the board (press the RESET button), and you should
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see the following message in the terminal:
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.. code-block:: console
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*** Booting Zephyr OS build v3.7.0-xxx-xxxx ***
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Hello World! frdm_mcxw72/mcxw727c/cpu0
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Debugging
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=========
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Here is an example for the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: frdm_mcxw72/mcxw727c/cpu0
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:goals: debug
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Open a serial terminal, step through the application in your debugger, and you
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should see the following message in the terminal:
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.. code-block:: console
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*** Booting Zephyr OS build v3.7.0-xxx-xxxx ***
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Hello World! frdm_mcxw72/mcxw727c/cpu0
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Troubleshooting
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===============
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.. include:: ../../common/segger-ecc-systemview.rst
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:start-after: segger-ecc-systemview
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References
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**********
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.. target-notes::
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.. _MCXW72 SoC Website:
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https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/mcx-arm-cortex-m/mcx-w-series-microcontrollers/mcx-w72x-secure-and-ultra-low-power-mcus-for-matter-thread-zigbee-and-bluetooth-le:MCX-W72X
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.. _FRDM-MCXW72 Website:

‎boards/nxp/frdm_mcxw72/frdm_mcxw72-pinctrl.dtsi

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/*
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* Copyright 2024 NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/mcx/MCXW727CMFTA-pinctrl.h>
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&pinctrl {
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pinmux_lpuart0: pinmux_lpuart0 {
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group0 {
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pinmux = <LPUART0_RX_PTA16>, <LPUART0_TX_PTA17>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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pinmux_lpuart1: pinmux_lpuart1 {
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group0 {
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pinmux = <LPUART1_RX_PTC2>, <LPUART1_TX_PTC3>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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pinmux_tpm0: pinmux_tpm0 {
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group0 {
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pinmux = <TPM0_CH0_PTA21>, <TPM0_CH1_PTA20>,
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<TPM0_CH2_PTA19>, <TPM0_CH3_PTA18>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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pinmux_lpspi1: pinmux_lpspi1 {
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group0 {
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pinmux = <LPSPI1_SIN_PTB1>,
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<LPSPI1_SOUT_PTB3>;
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slew-rate = "fast";
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drive-strength = "low";
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};
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};
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pinmux_flexcan: pinmux_flexcan {
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group0 {
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pinmux = <CAN0_RX_PTC5>, <CAN0_TX_PTC4>;
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slew-rate = "slow";
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drive-strength = "low";
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};
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};
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pinmux_lpadc0: pinmux_lpadc0 {
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group0 {
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pinmux = <ADC0_A6_PTD2>,
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<ADC0_B6_PTD3>,
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<ADC0_B5_PTD1>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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pinmux_lpi2c0: pinmux_lpi2c0 {
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group0 {
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pinmux = <LPI2C0_SCL_PTA19>,
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<LPI2C0_SDA_PTA18>;
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drive-strength = "low";
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slew-rate = "fast";
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drive-open-drain;
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};
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};
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pinmux_lpi2c1: pinmux_lpi2c1 {
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group0 {
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pinmux = <LPI2C1_SCL_PTB5>,
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<LPI2C1_SDA_PTB4>;
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drive-strength = "low";
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slew-rate = "fast";
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drive-open-drain;
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};
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};
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};

‎boards/nxp/frdm_mcxw72/frdm_mcxw72_mcxw727c_cpu0.dts

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/*
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* Copyright 2024 NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_mcxw72.dtsi>
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#include "frdm_mcxw72-pinctrl.dtsi"
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/ {
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model = "NXP FRDM-MCXW72 board";
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aliases {
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led0 = &blue_led;
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blue-pwm-led = &blue_pwm_led;
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green-pwm-led = &green_pwm_led;
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red-pwm-led = &red_pwm_led;
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};
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chosen {
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zephyr,flash = &flash;
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zephyr,flash-controller = &fmu;
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zephyr,code-partition = &code_partition;
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zephyr,sram = &stcm0;
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zephyr,console = &lpuart1;
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zephyr,shell-uart = &lpuart1;
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zephyr,uart-pipe = &lpuart0;
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zephyr,canbus = &flexcan0;
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};
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user_led {
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compatible = "gpio-leds";
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blue_led: led {
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gpios = <&gpioc 1 GPIO_ACTIVE_HIGH>;
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};
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};
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pwmleds {
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compatible = "pwm-leds";
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blue_pwm_led: pwm_led_0 {
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pwms = <&tpm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
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};
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green_pwm_led: pwm_led_1 {
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pwms = <&tpm0 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
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};
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red_pwm_led: pwm_led_2 {
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pwms = <&tpm0 2 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
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};
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};
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};
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&gpioa {
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status = "okay";
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};
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&gpioc {
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status = "okay";
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};
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&lpuart0 {
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current-speed = <115200>;
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status = "okay";
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pinctrl-0 = <&pinmux_lpuart0>;
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pinctrl-names = "default";
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};
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&lpuart1 {
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current-speed = <115200>;
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status = "okay";
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pinctrl-0 = <&pinmux_lpuart1>;
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pinctrl-names = "default";
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};
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&flash {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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code_partition: partition@0 {
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reg = <0x0 DT_SIZE_K(67)>;
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};
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storage_partition: partition@10c00 {
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reg = <0x10c00 DT_SIZE_K(1981)>;
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};
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};
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};
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&fmu {
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status = "okay";
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};
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&tpm0 {
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status = "okay";
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pinctrl-0 = <&pinmux_tpm0>;
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pinctrl-names = "default";
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};
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&lptmr0 {
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status = "okay";
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};
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&lpspi1 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpspi1>;
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pinctrl-names = "default";
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};
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&flexcan0 {
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status = "okay";
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pinctrl-0 = <&pinmux_flexcan>;
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pinctrl-names = "default";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&vref {
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status = "okay";
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};
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&adc0 {
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pinctrl-0 = <&pinmux_lpadc0>;
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pinctrl-names = "default";
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status = "okay";
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};
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&lpi2c1 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpi2c1>;
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pinctrl-names = "default";
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};

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