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boards: nxp: add imx91_evk support
The i.MX 91 Evaluation Kit (MCIMX91-EVK board) is a platform designed to display the most commonly used features of the i.MX 91 applications processor. The MCIMX91-EVK board is an entry-level development board with a small and low-cost package. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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‎boards/nxp/imx91_evk/Kconfig.imx91_evk

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# Copyright 2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_IMX91_EVK
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select SOC_MIMX9131
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select SOC_PART_NUMBER_MIMX9131CVVXJ

‎boards/nxp/imx91_evk/board.yml

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board:
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name: imx91_evk
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full_name: i.MX91 EVK
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vendor: nxp
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socs:
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- name: mimx9131

‎boards/nxp/imx91_evk/doc/index.rst

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.. zephyr:board:: imx91_evk
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Overview
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********
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The i.MX 91 Evaluation Kit (MCIMX91-EVK board) is a platform designed
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to display the most commonly used features of the i.MX 91 applications
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processor. The MCIMX91-EVK board is an entry-level development board
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with a small and low-cost package. The board can be used by developers
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to get familiar with the processor before investing a large amount of
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resources in more specific designs.
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The i.MX 91 applications processor features an Arm Cortex-A55 core
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that can operate at speeds of up to 1.4 GHz.
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- Board features:
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- RAM: 2GB LPDDR4
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- Storage:
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- SanDisk 16GB eMMC5.1
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- microSD Socket
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- Wireless:
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- Murata Type-2EL (SDIO+UART+SPI) module. It is based on NXP IW612 SoC,
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which supports dual-band (2.4 GHz /5 GHz) 1x1 Wi-Fi 6, Bluetooth 5.2,
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and 802.15.4
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- USB:
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- Two USB 2.0 Type C connectors
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- Ethernet:
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- ENET: 10/100/1000 Mbit/s RGMII Ethernet connected with external PHY
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RTL8211
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- ENET_QoS: 10/100/1000 Mbit/s RGMII Ethernet supporting TSN connected
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with external PHY RTL8211
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- PCIe:
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- One M.2/NGFF Key E mini card 75-pin connector
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- Connectors:
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- 40-Pin Dual Row Header
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- LEDs:
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- 1x Power status LED
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- 2x UART LED
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- Debug:
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- JTAG 20-pin connector
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- MicroUSB for UART debug
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Supported Features
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==================
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The ``imx91_evk`` board supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| GIC-v3 | on-chip | interrupt controller |
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+-----------+------------+-------------------------------------+
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| ARM TIMER | on-chip | system clock |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | clock_control |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-----------+------------+-------------------------------------+
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Devices
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========
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System Clock
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------------
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This board configuration uses a system clock frequency of 24 MHz.
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Cortex-A55 Core runs up to 1.4 GHz.
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Serial Port
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-----------
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This board configuration uses a single serial communication channel with the
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CPU's UART1 for A55 core.
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Programming and Debugging
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*******************************
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U-Boot "go" command is used to load and kick Zephyr to Cortex-A55 Core.
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Copy the compiled ``zephyr.bin`` to the first FAT partition of the SD card and
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plug the SD card into the board. Power it up and stop the u-boot execution at
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prompt.
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Use U-Boot to load and kick zephyr.bin to Cortex-A55 Core:
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.. code-block:: console
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fatload mmc 1:1 0x80000000 zephyr.bin; dcache flush; icache flush; go 0x80000000
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Use this configuration to run basic Zephyr applications and kernel tests,
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for example, with the :zephyr:code-sample:`synchronization` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/synchronization
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:host-os: unix
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:board: imx91_evk/mimx9131
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:goals: build
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This will build an image with the synchronization sample app, boot it and
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display the following console output:
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.. code-block:: console
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*** Booting Zephyr OS build v4.0.0-3277-g69f43115c9a8 ***
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thread_a: Hello World from cpu 0 on imx91_evk!
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thread_b: Hello World from cpu 0 on imx91_evk!
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thread_a: Hello World from cpu 0 on imx91_evk!
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thread_b: Hello World from cpu 0 on imx91_evk!
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References
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==========
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More information can refer to NXP official website:
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`NXP website`_.
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.. _NXP website:
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https://www.nxp.com/products/i.MX91

‎boards/nxp/imx91_evk/imx91_evk-pinctrl.dtsi

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/*
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* Copyright 2025 NXP
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include <nxp/nxp_imx/mimx9131cvvxj-pinctrl.dtsi>
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&pinctrl {
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uart1_default: uart1_default {
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group0 {
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pinmux = <&iomuxc1_uart1_rxd_lpuart_rx_lpuart1_rx>,
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<&iomuxc1_uart1_txd_lpuart_tx_lpuart1_tx>;
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bias-pull-up;
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slew-rate = "slightly_fast";
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drive-strength = "x5";
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};
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};
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uart2_default: uart2_default {
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group0 {
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pinmux = <&iomuxc1_uart2_rxd_lpuart_rx_lpuart2_rx>,
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<&iomuxc1_uart2_txd_lpuart_tx_lpuart2_tx>;
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bias-pull-up;
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slew-rate = "slightly_fast";
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drive-strength = "x5";
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};
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};
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};

‎boards/nxp/imx91_evk/imx91_evk_mimx9131.dts

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/*
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* Copyright 2025 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_mimx91.dtsi>
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#include "imx91_evk-pinctrl.dtsi"
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/ {
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model = "NXP i.MX91 A55";
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compatible = "fsl,mimx91";
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chosen {
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zephyr,console = &lpuart1;
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zephyr,shell-uart = &lpuart1;
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/* sram node actually locates at DDR DRAM */
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zephyr,sram = &dram;
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};
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dram: memory@80000000 {
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reg = <0x80000000 DT_SIZE_M(1)>;
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};
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};
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&lpuart1 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart1_default>;
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pinctrl-names = "default";
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};

‎boards/nxp/imx91_evk/imx91_evk_mimx9131.yaml

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#
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# Copyright 2025 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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identifier: imx91_evk/mimx9131
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name: NXP i.MX91 EVK
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 1024
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supported:
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- uart
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vendor: nxp

‎boards/nxp/imx91_evk/imx91_evk_mimx9131_defconfig

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#
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# Copyright 2025 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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# ARM Options
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CONFIG_AARCH64_IMAGE_HEADER=y
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CONFIG_ARMV8_A_NS=y
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# MMU Options
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# Increase the value when encounter the assert on the MAX_XLAT_TABLES
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CONFIG_MAX_XLAT_TABLES=24
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# Cache Options
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_DCACHE_LINE_SIZE_DETECT=y
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CONFIG_ICACHE_LINE_SIZE_DETECT=y
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# Zephyr Kernel Configuration
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CONFIG_XIP=n
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_CLOCK_CONTROL=y

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