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15 | 15 | #include <zephyr/irq.h>
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16 | 16 |
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17 | 17 | LOG_MODULE_REGISTER(mss_qspi, CONFIG_SPI_LOG_LEVEL);
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| 18 | + |
| 19 | +/* Is MSS QSPI module 'resets' line property defined */ |
| 20 | +#define MSS_QSPI_RESET_ENABLED DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets) |
| 21 | + |
| 22 | +#if MSS_QSPI_RESET_ENABLED |
| 23 | +#include <zephyr/drivers/reset.h> |
| 24 | +#endif |
| 25 | + |
18 | 26 | #include "spi_context.h"
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19 | 27 |
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20 | 28 | /*MSS QSPI Register offsets */
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@@ -101,6 +109,9 @@ struct mss_qspi_config {
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101 | 109 | void (*irq_config_func)(const struct device *dev);
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102 | 110 | int irq;
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103 | 111 | uint32_t clock_freq;
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| 112 | +#if MSS_QSPI_RESET_ENABLED |
| 113 | + struct reset_dt_spec reset_spec; |
| 114 | +#endif |
104 | 115 | };
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105 | 116 |
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106 | 117 | /* Device run time data */
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@@ -555,6 +566,12 @@ static int mss_qspi_init(const struct device *dev)
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555 | 566 | unsigned int ret = 0;
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556 | 567 | uint32_t control = 0;
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557 | 568 |
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| 569 | +#if MSS_QSPI_RESET_ENABLED |
| 570 | + if (cfg->reset_spec.dev != NULL) { |
| 571 | + (void)reset_line_deassert_dt(&cfg->reset_spec); |
| 572 | + } |
| 573 | +#endif |
| 574 | + |
558 | 575 | cfg->irq_config_func(dev);
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559 | 576 |
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560 | 577 | control &= ~(MSS_QSPI_CONTROL_SAMPLE_MSK);
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@@ -587,6 +604,8 @@ static DEVICE_API(spi, mss_qspi_driver_api) = {
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587 | 604 | .base = DT_INST_REG_ADDR(n), \
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588 | 605 | .irq_config_func = mss_qspi_config_func_##n, \
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589 | 606 | .clock_freq = DT_INST_PROP(n, clock_frequency), \
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| 607 | + IF_ENABLED(DT_INST_NODE_HAS_PROP(n, resets), \ |
| 608 | + (.reset_spec = RESET_DT_SPEC_INST_GET(n),)) \ |
590 | 609 | }; \
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591 | 610 | \
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592 | 611 | static struct mss_qspi_data mss_qspi_data_##n = { \
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