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16 | 16 |
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17 | 17 | LOG_MODULE_REGISTER(mss_spi, CONFIG_SPI_LOG_LEVEL);
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18 | 18 |
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| 19 | +/* Is MSS SPI module 'resets' line property defined */ |
| 20 | +#define MSS_SPI_RESET_ENABLED DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets) |
| 21 | + |
| 22 | +#if MSS_SPI_RESET_ENABLED |
| 23 | +#include <zephyr/drivers/reset.h> |
| 24 | +#endif |
| 25 | + |
19 | 26 | #include "spi_context.h"
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20 | 27 |
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21 | 28 | /* MSS SPI Register offsets */
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@@ -102,6 +109,9 @@ struct mss_spi_config {
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102 | 109 | mm_reg_t base;
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103 | 110 | uint8_t clk_gen;
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104 | 111 | int clock_freq;
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| 112 | +#if MSS_SPI_RESET_ENABLED |
| 113 | + struct reset_dt_spec reset_spec; |
| 114 | +#endif |
105 | 115 | };
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106 | 116 |
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107 | 117 | struct mss_spi_transfer {
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@@ -426,6 +436,12 @@ static int mss_spi_init(const struct device *dev)
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426 | 436 | int ret = 0;
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427 | 437 | uint32_t control = 0;
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428 | 438 |
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| 439 | +#if MSS_SPI_RESET_ENABLED |
| 440 | + if (cfg->reset_spec.dev != NULL) { |
| 441 | + (void)reset_line_deassert_dt(&cfg->reset_spec); |
| 442 | + } |
| 443 | +#endif |
| 444 | + |
429 | 445 | /* Remove SPI from Reset */
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430 | 446 | control = mss_spi_read(cfg, MSS_SPI_REG_CONTROL);
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431 | 447 | control &= ~MSS_SPI_CONTROL_RESET;
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@@ -470,6 +486,8 @@ static DEVICE_API(spi, mss_spi_driver_api) = {
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470 | 486 | static const struct mss_spi_config mss_spi_config_##n = { \
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471 | 487 | .base = DT_INST_REG_ADDR(n), \
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472 | 488 | .clock_freq = DT_INST_PROP(n, clock_frequency), \
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| 489 | + IF_ENABLED(DT_INST_NODE_HAS_PROP(n, resets), \ |
| 490 | + (.reset_spec = RESET_DT_SPEC_INST_GET(n),)) \ |
473 | 491 | }; \
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474 | 492 | \
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475 | 493 | static struct mss_spi_data mss_spi_data_##n = { \
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