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LaurentiuM1234kartben
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drivers: clock_control: mcux_ccm: support QM/QXP's ESAI/AUD_PLL1 clocks
Add support for gating/ungating IMX8QM/IMX8QXP's ESAI clocks and the AUD_PLL_DIV_CLK0 clock used as source for ESAI's EXTAL. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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3 files changed

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drivers/clock_control/clock_control_mcux_ccm.c

Lines changed: 56 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,11 @@
2020
#include <zephyr/logging/log.h>
2121
LOG_MODULE_REGISTER(clock_control);
2222

23+
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
24+
#define AUD_PLL_DIV_CLK0_LPCG UINT_TO_POINTER(0x59D20000)
25+
static sc_ipc_t ipc_handle;
26+
#endif
27+
2328
#ifdef CONFIG_SPI_NXP_LPSPI
2429
static const clock_name_t lpspi_clocks[] = {
2530
kCLOCK_Usb1PllPfd1Clk,
@@ -81,6 +86,15 @@ static const clock_ip_name_t sai_clocks[] = {
8186
#endif
8287
#endif /* CONFIG_DAI_NXP_SAI */
8388

89+
#ifdef CONFIG_DAI_NXP_ESAI
90+
#if defined(CONFIG_SOC_MIMX8QX6_ADSP) || defined(CONFIG_SOC_MIMX8QM6_ADSP)
91+
static const clock_ip_name_t esai_clocks[] = {
92+
kCLOCK_AUDIO_Esai0,
93+
kCLOCK_AUDIO_Esai1,
94+
};
95+
#endif
96+
#endif /* CONFIG_DAI_NXP_ESAI */
97+
8498
#if defined(CONFIG_I2C_NXP_II2C)
8599
static const clock_ip_name_t i2c_clk_root[] = {
86100
kCLOCK_RootI2c1,
@@ -139,6 +153,27 @@ static int mcux_ccm_on(const struct device *dev,
139153
#endif
140154
#endif /* CONFIG_DAI_NXP_SAI */
141155

156+
#ifdef CONFIG_DAI_NXP_ESAI
157+
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
158+
case IMX_CCM_ESAI0_CLK:
159+
case IMX_CCM_ESAI1_CLK:
160+
CLOCK_EnableClock(esai_clocks[instance]);
161+
return 0;
162+
#endif
163+
#endif /* CONFIG_DAI_NXP_ESAI */
164+
165+
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
166+
case IMX_CCM_AUD_PLL_DIV_CLK0:
167+
/* ungate PLL parent */
168+
sc_pm_clock_enable(ipc_handle, SC_R_AUDIO_PLL_0,
169+
SC_PM_CLK_MISC0, true, false);
170+
171+
/* ungate the clock itself */
172+
CLOCK_SetLpcgGate(AUD_PLL_DIV_CLK0_LPCG, true, false, 0xa);
173+
174+
return 0;
175+
#endif
176+
142177
#if defined(CONFIG_ETH_NXP_ENET)
143178
#ifdef CONFIG_SOC_SERIES_IMX8M
144179
#define ENET_CLOCK kCLOCK_Enet1
@@ -180,6 +215,27 @@ static int mcux_ccm_off(const struct device *dev,
180215
return 0;
181216
#endif
182217
#endif /* CONFIG_DAI_NXP_SAI */
218+
219+
#ifdef CONFIG_DAI_NXP_ESAI
220+
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
221+
case IMX_CCM_ESAI0_CLK:
222+
case IMX_CCM_ESAI1_CLK:
223+
CLOCK_DisableClock(esai_clocks[instance]);
224+
return 0;
225+
#endif
226+
#endif /* CONFIG_DAI_NXP_ESAI */
227+
228+
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
229+
case IMX_CCM_AUD_PLL_DIV_CLK0:
230+
/* gate the clock itself */
231+
CLOCK_SetLpcgGate(AUD_PLL_DIV_CLK0_LPCG, false, false, 0xa);
232+
233+
/* gate PLL parent */
234+
sc_pm_clock_enable(ipc_handle, SC_R_AUDIO_PLL_0,
235+
SC_PM_CLK_MISC0, false, false);
236+
237+
return 0;
238+
#endif
183239
default:
184240
(void)instance;
185241
return 0;
@@ -540,7 +596,6 @@ static DEVICE_API(clock_control, mcux_ccm_driver_api) = {
540596
static int mcux_ccm_init(const struct device *dev)
541597
{
542598
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
543-
sc_ipc_t ipc_handle;
544599
int ret;
545600

546601
ret = sc_ipc_open(&ipc_handle, DT_REG_ADDR(DT_NODELABEL(scu_mu)));

dts/xtensa/nxp/nxp_imx8.dtsi

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright 2021, 2024 NXP
2+
* Copyright 2021, 2024-2025 NXP
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -156,6 +156,8 @@
156156
reg = <0x59010000 DT_SIZE_K(64)>;
157157
dmas = <&edma0 7 0>, <&edma0 6 0>;
158158
dma-names = "tx", "rx";
159+
clocks = <&ccm IMX_CCM_AUD_PLL_DIV_CLK0 0x0 0x0>,
160+
<&ccm IMX_CCM_ESAI0_CLK 0x0 0x0>;
159161
esai-pin-modes = <ESAI_PIN_HCKR ESAI_PIN_DISCONNECTED>,
160162
<ESAI_PIN_HCKT ESAI_PIN_DISCONNECTED>,
161163
<ESAI_PIN_SDO4_SDI1 ESAI_PIN_DISCONNECTED>,

include/zephyr/dt-bindings/clock/imx_ccm.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright 2017-2022,2024 NXP
2+
* Copyright 2017-2022,2024-2025 NXP
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -79,4 +79,9 @@
7979
#define IMX_CCM_I2C5_CLK 0x1404UL
8080
#define IMX_CCM_I2C6_CLK 0x1405UL
8181

82+
#define IMX_CCM_ESAI0_CLK 0x1500UL
83+
#define IMX_CCM_ESAI1_CLK 0x1501UL
84+
85+
#define IMX_CCM_AUD_PLL_DIV_CLK0 0x1600UL
86+
8287
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_H_ */

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