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hal_nxp: Sync 25.06 i.MX to hal_nxp
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
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mcux/mcux-sdk-ng/devices/i.MX/LICENSE

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Copyright 1997-2016 Freescale Semiconductor, Inc
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Copyright 2016-2024 NXP
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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{
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"SPDXID": "SPDXRef-DOCUMENT",
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"spdxVersion": "SPDX-2.3",
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"creationInfo": {
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"created": "2025-05-21T04:06:01Z",
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"creators": [
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"Organization: NXP"
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],
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"licenseListVersion": "3.20"
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},
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"name": "mcux-devices-imx-v25.06.00",
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"dataLicense": "CC0-1.0",
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"documentNamespace": "https://nxp.com/spdx/5136603d-0922-4812-ace1-32762b1d045f",
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"packages": [
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{
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"SPDXID": "SPDXRef-package-5136603d-0922-4812-ace1-32762b1d045f",
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"name": "mcux-devices-imx",
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"versionInfo": "v25.06.00",
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"licenseConcluded": "(BSD-3-Clause)",
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"licenseDeclared": "(BSD-3-Clause)",
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"downloadLocation": "https://github.com/nxp-mcuxpresso/mcux-devices-imx",
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"originator": "Organization: NXP",
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"supplier": "NOASSERTION",
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"externalRefs": [],
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"filesAnalyzed": false
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}
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],
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"relationships": [
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{
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"spdxElementId": "SPDXRef-DOCUMENT",
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"relationshipType": "DESCRIBES",
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"relatedSpdxElement": "SPDXRef-package-5136603d-0922-4812-ace1-32762b1d045f"
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}
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]
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}

mcux/mcux-sdk-ng/devices/i.MX/SCR.txt

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NXP Software Content Register
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Package: mcux-devices-imx
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Version: 24.12.00-pvw2
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Outgoing License: BSD-3-Clause
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License File: LICENSE
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Type of content: source code, linker files
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Description and comments: Device system files, template files, IDE related startup and linker files.
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Release Location: https://github.com/nxp-mcuxpresso/mcux-devices-imx
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Origin:
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NXP (BSD-3-Clause)
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NXP (Apache-2.0)

mcux/mcux-sdk-ng/devices/i.MX/i.MX7ULP/MCIMX7U3/CMakeLists.txt

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#### device spepcific drivers
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include(${SdkRootDirPath}/devices/arm/device_header.cmake)
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mcux_add_cmakelists(${SdkRootDirPath}/devices/i.MX/i.MX7ULP/MCIMX7U3/drivers)
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mcux_add_cmakelists(${SdkRootDirPath}/${device_root}/i.MX/i.MX7ULP/MCIMX7U3/drivers)
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#### MIMX shared drivers/components/middlewares, project segments
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include(${SdkRootDirPath}/devices/i.MX/shared.cmake)

mcux/mcux-sdk-ng/devices/i.MX/i.MX7ULP/MCIMX7U3/MCIMX7U3_cm4.h

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** Keil ARM C/C++ Compiler
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**
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** Reference manual: IMX7ULPRM, Rev. 0, Nov. 2018
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** Version: rev. 7.0, 2018-11-05
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** Build: b240708
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** Version: rev. 8.0, 2024-10-29
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** Build: b250520
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**
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** Abstract:
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** CMSIS Peripheral Access Layer for MCIMX7U3_cm4
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**
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** Copyright 1997-2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2024 NXP
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** Copyright 2016-2025 NXP
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** RevB(B0) Header GA
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** - rev. 7.0 (2018-11-05)
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** RevA(B1) Header
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** - rev. 8.0 (2024-10-29)
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** Change the device header file from single flat file to multiple files based on peripherals,
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** each peripheral with dedicated header file located in periphN folder.
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**
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** ###################################################################
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*/
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/*!
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* @file MCIMX7U3_cm4.h
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* @version 7.0
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* @date 2018-11-05
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* @version 8.0
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* @date 2024-10-29
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* @brief CMSIS Peripheral Access Layer for MCIMX7U3_cm4
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*
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* CMSIS Peripheral Access Layer for MCIMX7U3_cm4

mcux/mcux-sdk-ng/devices/i.MX/i.MX7ULP/MCIMX7U3/MCIMX7U3_cm4_COMMON.h

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** Keil ARM C/C++ Compiler
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**
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** Reference manual: IMX7ULPRM, Rev. 0, Nov. 2018
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** Version: rev. 7.0, 2018-11-05
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** Build: b240708
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** Version: rev. 8.0, 2024-10-29
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** Build: b250520
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**
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** Abstract:
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** CMSIS Peripheral Access Layer for MCIMX7U3_cm4
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**
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** Copyright 1997-2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2024 NXP
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** Copyright 2016-2025 NXP
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** RevB(B0) Header GA
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** - rev. 7.0 (2018-11-05)
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** RevA(B1) Header
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** - rev. 8.0 (2024-10-29)
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** Change the device header file from single flat file to multiple files based on peripherals,
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** each peripheral with dedicated header file located in periphN folder.
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**
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** ###################################################################
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*/
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/*!
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* @file MCIMX7U3_cm4_COMMON.h
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* @version 7.0
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* @date 2018-11-05
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* @version 8.0
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* @date 2024-10-29
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* @brief CMSIS Peripheral Access Layer for MCIMX7U3_cm4
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*
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* CMSIS Peripheral Access Layer for MCIMX7U3_cm4
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/** Memory map major version (memory maps with equal major version number are
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* compatible) */
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#define MCU_MEM_MAP_VERSION 0x0700U
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#define MCU_MEM_MAP_VERSION 0x0800U
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/** Memory map minor version */
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#define MCU_MEM_MAP_VERSION_MINOR 0x0000U
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#include "core_cm4.h" /* Core Peripheral Access Layer */
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#include "system_MCIMX7U3_cm4.h" /* Device specific configuration file */
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#define MCIMX7U3_cm4_SERIES
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/* CPU specific feature definitions */
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#include "MCIMX7U3_cm4_features.h"
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/*!
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* @}
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*/ /* end of group Cortex_Core_Configuration */
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#ifndef MCIMX7U3_cm4_SERIES
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#define MCIMX7U3_cm4_SERIES
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#endif
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/* CPU specific feature definitions */
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#include "MCIMX7U3_cm4_features.h"
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/* ADC - Peripheral instance base addresses */
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/** Peripheral ADC0 base address */
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#define ADC0_BASE (0x41041000u)

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