10GbE XGMII TCP/IPv4 packet generator for Verilog
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Updated
Jan 28, 2025 - C++
10GbE XGMII TCP/IPv4 packet generator for Verilog
Third project of 2023-2024 year which aims creating our own assembly language, with an interpreter to be able to read and run our programs. 📎
[ABANDONED] A small product of boredom. Incomplete and abandoned.
[ABANDONED] Just another product of boredom.
This is virtual machine named Ameer Virtual Processor to which languages can be compiled to, and be ran on. This runs well with either Nuitka or PyPy
TAYLOR: TernArY virtuaL prOcessoR
Stack-based virtual processor and code assembler/disassembler to it.
A new EPU, completely virtual, in the browser
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