TinyMe is lightweight PSP (Playstation Portable) Media Engine library to run code over the second mips CPU
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Updated
Jul 17, 2025 - C++
TinyMe is lightweight PSP (Playstation Portable) Media Engine library to run code over the second mips CPU
Sample code for loading YCbCr planes from the main Sony PSP's CPU to uncached memory, transferring them to the Media Engine's eDRAM, and processing RGB conversion via the VME. The converted output is written to VRAM as the destination framebuffer, demonstrating Color Space Conversion hardware registers for video processing.
Basic sample code demonstrating how to use the hardware spinlock as a mutex between the Sony PSP (Playtation Portable) main CPU and the Media Engine CPU, enabling concurrent writing in cached memory.
Sample code for the Sony PSP's Media Engine, demonstrating how to write and update a Ge list concurrently from both CPU.
Sample implementation for converting YCbCr to RGB using PSP (Playstation Portable) CSC controller with VME backend. Supports 992×992 resolution through dual buffer system. Requires physical hardware with Media Engine support.
First demo using the primary DMAC of the VME/DSP over the PSP's Media Engine, transferring data betwen DSP buffers and main memory
This repository demonstrates transferring data between the Sony PSP Media Engine CPU and the main CPU via DMACPlus, drawing one half of a 'clock' on each side and gathering data with DMACPlus channels and LLIs.
Example of a dmacplus transfer, between the PSP's Media Engine and the Main CPU (me2sc).
Transfer data using dmacplus hardware registers from RAM on the main CPU to the Media Engine's eDRAM, then transfer the data from me edram to ge edram
This repository contains links to recent samples and code examples related to the Sony PSP (PlayStation Portable) Media Engine. These examples are the result of personal exploration. Topics include VME, GU/GE, DMAC, DMACPLUS, spinlocks, interrupts, and Color Space Conversion (CSC).
This is a minimal reset handler for the Sony PSP's Media Engine CPU. After a hardware reset, the CPU jumps to 0xBFC00000, initializes the status register, configures the FPU coprocessor flags, and continues execution in kernel mode.
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