Stochastic Computing for Deep Neural Networks

Library for arbitrary precision arithmetic in C

Design and implementation of RISC-V processor with a pipelined datapath, controller, and hazard unit.

Code for reproducing CoNGA 2022 results on posit arithmetic operators

POPiX: Floating to Fixed-Point Code Generator

Assignment codes for Introduction to Numerical Analysis (2020, FGV-EMAp).

Generating Posit-Based Accelerators With High-Level Synthesis

Computer Architecture: 01:198:211 This course covers the fundamental issues in the design of modern computer systems, including the design and implementation of key hardware components such as the processor, memory, and I/O devices, and the software/hardware interface.

Design and implementation of RISC-V processor with a multi-cycle datapath and controller.

Code for reproducing CoNGA 2023 results on approximate posit arithmetic

Design and implementation of RISC-V processor with a single-cycle datapath and controller.

Naive x86_64 assembly for big integer arithmetics and generating binary factorial tables

A 32 bit Booth Encoded Wallace Tree Multiplier in Verilog HDL.

Course Taken @ UCMerced [2021]

Learned computer arithmetic: adders, multipliers, dividers, floating-point, and CORDIC algorithms. Modeled in C++ and implemented in Verilog HDL. Referenced Parhami’s Computer Arithmetic and COD Ch.3 for architecture insights.

Study of Montgomery Modular Multiplication in Residue Number Systems

Simulations of the following computer arithmetic algorithms: Booth, Booth Radix4, Restoring, Non-Restoring, Radix4 SRT, Radix2 SRT