IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
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Jun 27, 2025 - Shell
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analog-design
Here are 82 public repositories matching this topic...
Python script for generating lookup tables for the gm/ID design methodology and much more ...
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Apr 24, 2025 - Python
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
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Jun 12, 2023 - MATLAB
This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
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Mar 2, 2022
Online viewer of Xschem schematic files
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Dec 11, 2024 - JavaScript
This project shows the design process of the main blocks of a typical RX frontend system.
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Jan 2, 2021
Fundamental analog circuit designs to kick start and embark the journey in the world of IC design.
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Aug 31, 2023
This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.
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Feb 21, 2019
A MATLAB project that uses modified nodal analysis to calculate the node voltages of any analog circuit.
algorithm algorithms matlab circuit-simulator circuits circuit circuit-simulation nodal-analysis circuit-analysis netlist mna circuits-simulator analog-design netlist-parser netlists circuit-theory modified-node-analysis modified-nodal-analysis node-analysis netlist-simulator
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Aug 8, 2022 - MATLAB
An LTspice project which contains third-order Butterworth filters built both using an inductor and a current conveyor.
filter circuits filters circuit circuit-simulation butterworth-filter filter-design analog-design ltspice circuit-design spice-simulator pspice analog-circuit spice-simulation ltspicexvii analog-filter ltspice-symbols ltspice-simulation-files spice-analysis signal-processing-filters
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Jan 15, 2024
This library is an attempt to make transistor sizing for Analog design less painful.
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Jun 22, 2025 - Python
Design of 6T, 8T and 10T SRAM Cells with Static Noise Margin Analysis
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Dec 9, 2022 - AGS Script
This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using high-swing cascode current mirror structures for the current source arrays.
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May 2, 2025
This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.
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Mar 17, 2019
This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Power / (fs*2ENOB).
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Sep 12, 2023
An EDA tool for automatic device sizing using Gm/Id method.
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Sep 13, 2024 - Python
Design of miller compensated 2 stage opamp using open source SKY130PDK
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Jun 18, 2025
8x PLL Clock Multiplier PLL Design with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving an 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
open-source design magic asic gds open-source-project ic open-source-hardware ngspice pll analog-design rtl2gds clock-multiplier google-skywater-pdk charge-pum voltage-controlled-oscillator
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Jul 21, 2022
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