Merge #426

426: Bump bxcan r=burrbull a=Fomys

This pull request bump the version of bxcan from 0.6 to [0.7](https://github.com/stm32-rs/bxcan/releases/tag/v0.7.0), which introduce the second can FIFO. 
All CAN example are updated to use the new version of bxcan.
(I don't know how to add label, but this is a breaking change)

Co-authored-by: Louis Chauvet <louis.chauvet@free.fr>

Author: bors[bot]

CHANGELOG.md

@@ -17,6 +17,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Passing the `Clock` parameter to `Serial` by reference.
 - `Serial::usart1/2/3` -> `Serial::new`.
 - `Serial` implements `Write<WORD>` and `Read<WORD>` for `WORD` simultaneously as u8 and u16.
+- Bump bxcan version to [v0.7.0](https://github.com/stm32-rs/bxcan/releases/tag/v0.7.0)
 
 ### Added
 

Cargo.toml

@@ -23,7 +23,7 @@ cortex-m-rt = "0.7.1"
 nb = "1"
 stm32f1 = "0.14.0"
 embedded-dma = "0.2.0"
-bxcan = "0.6"
+bxcan = "0.7"
 void = { default-features = false, version = "1.0.2" }
 embedded-hal = { features = ["unproven"], version = "0.2.7" }
 fugit = "0.3.5"

examples/can-echo.rs

@@ -4,6 +4,7 @@
 #![no_main]
 #![no_std]
 
+use bxcan::Fifo;
 use panic_halt as _;
 
 use bxcan::filter::Mask32;
@@ -45,7 +46,7 @@ fn main() -> ! {
 
     // Configure filters so that can frames can be received.
     let mut filters = can1.modify_filters();
-    filters.enable_bank(0, Mask32::accept_all());
+    filters.enable_bank(0, Fifo::Fifo0, Mask32::accept_all());
 
     #[cfg(feature = "connectivity")]
     let _can2 = {
@@ -58,14 +59,14 @@ fn main() -> ! {
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/
-        let mut can2 = bxcan::Can::builder(can)
+        let can2 = bxcan::Can::builder(can)
             .set_bit_timing(0x001c_0003)
             .leave_disabled();
 
         // A total of 28 filters are shared between the two CAN instances.
         // Split them equally between CAN1 and CAN2.
         let mut slave_filters = filters.set_split(14).slave_filters();
-        slave_filters.enable_bank(14, Mask32::accept_all());
+        slave_filters.enable_bank(14, Fifo::Fifo0, Mask32::accept_all());
         can2
     };
 

examples/can-loopback.rs

@@ -6,7 +6,7 @@
 
 use bxcan::{
     filter::{ListEntry16, ListEntry32, Mask16},
-    ExtendedId, Frame, StandardId,
+    ExtendedId, Fifo, Frame, StandardId,
 };
 use panic_halt as _;
 
@@ -50,6 +50,7 @@ fn main() -> ! {
     // TODO: Make this accept also ID 2
     filters.enable_bank(
         0,
+        Fifo::Fifo0,
         [
             // accepts 0 and 1
             Mask16::frames_with_std_id(StandardId::new(0).unwrap(), StandardId::new(1).unwrap()),
@@ -61,6 +62,7 @@ fn main() -> ! {
     // 2x 29bit id filter bank: Matches 4, 5
     filters.enable_bank(
         1,
+        Fifo::Fifo0,
         [
             ListEntry32::data_frames_with_id(ExtendedId::new(4).unwrap()),
             ListEntry32::data_frames_with_id(ExtendedId::new(5).unwrap()),
@@ -70,6 +72,7 @@ fn main() -> ! {
     // 4x 11bit id filter bank: Matches 8, 9, 10, 11
     filters.enable_bank(
         2,
+        Fifo::Fifo0,
         [
             ListEntry16::data_frames_with_id(StandardId::new(8).unwrap()),
             ListEntry16::data_frames_with_id(StandardId::new(9).unwrap()),

examples/can-rtic.rs

@@ -53,14 +53,14 @@ fn enqueue_frame(queue: &mut BinaryHeap<PriorityFrame, Max, 16>, frame: Frame) {
 #[rtic::app(device = stm32f1xx_hal::pac)]
 mod app {
     use super::{enqueue_frame, PriorityFrame};
-    use bxcan::{filter::Mask32, ExtendedId, Frame, Interrupts, Rx, StandardId, Tx};
+    use bxcan::{filter::Mask32, ExtendedId, Fifo, Frame, Interrupts, Rx0, StandardId, Tx};
     use heapless::binary_heap::{BinaryHeap, Max};
     use stm32f1xx_hal::{can::Can, pac::CAN1, prelude::*};
 
     #[local]
     struct Local {
         can_tx: Tx<Can<CAN1>>,
-        can_rx: Rx<Can<CAN1>>,
+        can_rx: Rx0<Can<CAN1>>,
     }
     #[shared]
     struct Shared {
@@ -101,15 +101,16 @@ mod app {
             .set_bit_timing(0x001c_0000)
             .leave_disabled();
 
-        can.modify_filters().enable_bank(0, Mask32::accept_all());
+        can.modify_filters()
+            .enable_bank(0, Fifo::Fifo0, Mask32::accept_all());
 
         // Sync to the bus and start normal operation.
         can.enable_interrupts(
             Interrupts::TRANSMIT_MAILBOX_EMPTY | Interrupts::FIFO0_MESSAGE_PENDING,
         );
         nb::block!(can.enable_non_blocking()).unwrap();
 
-        let (can_tx, can_rx) = can.split();
+        let (can_tx, can_rx, _) = can.split();
 
         let can_tx_queue = BinaryHeap::new();