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bors[bot]Johannes Draaijer
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Merge #427
427: Fix flash write error, according to errata r=burrbull a=datdenkikniet According to the [errata](https://www.st.com/resource/en/errata_sheet/es096-stm32f101x8b-stm32f102x8b-and-stm32f103x8b-mediumdensity-device-limitations-stmicroelectronics.pdf) for stm32f1, section 2.2.8, reading `BSY` after writing `STRT` needs a 1-cycle delay to be read correctly. It took a while for us to hit an issue with this (presumably due to eventual optimization by the compiler). Once you hit it, the chip just hangs, as the `while` loop that waits for `BSY` to be cleared immediately completes, which causes the page erase and lock bits are reset while an erase operation is still ongoing, which is probably not good. Co-authored-by: Johannes Draaijer <johannes.draaijer@mobilaris.se>
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CHANGELOG.md

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@@ -9,6 +9,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- `gpio`: port and pin generics first, then mode,
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`PinMode` for modes instead of pins, `HL` trait, other cleanups
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- `flash`: add one-cycle delay of reading `BSY` bit after setting `STRT` bit to
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fix errata.
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### Breaking changes
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src/flash.rs

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@@ -146,6 +146,13 @@ impl<'a> FlashWriter<'a> {
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// Start Operation
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self.flash.cr.cr().modify(|_, w| w.strt().set_bit());
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// Wait for at least one clock cycle before reading the
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// BSY bit, because there is a one-cycle delay between
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// setting the STRT bit and the BSY bit being asserted
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// by hardware. See STM32F105xx, STM32F107xx device errata,
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// section 2.2.8
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cortex_m::asm::nop();
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// Wait for operation to finish
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while self.flash.sr.sr().read().bsy().bit_is_set() {}
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