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e651eec
H7 take 2: setup code & Cargo.toml
datdenkikniet Feb 20, 2023
a3ccda9
PTP module
datdenkikniet Feb 20, 2023
24d082a
MAC module
datdenkikniet Feb 20, 2023
92289d7
DMA module
datdenkikniet Feb 21, 2023
0ad0e7c
Examples
datdenkikniet Feb 25, 2023
478cd86
Update github CI
datdenkikniet Feb 26, 2023
e8db78c
Placate CI
datdenkikniet Feb 26, 2023
b1609c9
Fix README example
datdenkikniet Feb 26, 2023
c2b9911
Allow unused on DMA register block impl on F4
datdenkikniet Feb 26, 2023
bac114e
Fix a caching issue on the RX timestamp
datdenkikniet Feb 26, 2023
cffc535
Fix async receive and timestamping on h7, it's wonky
datdenkikniet Feb 26, 2023
7cb43c4
Fix compilation error
datdenkikniet Mar 11, 2023
fb6e130
Make EthernetDMA::interrupt_handler pub(crate) in favor of stm32_eth:…
datdenkikniet Mar 12, 2023
4c0e24d
Fix read_and_clear logic for h7
datdenkikniet Mar 12, 2023
51881df
Update feature for enabling timestamp interrupt
datdenkikniet Mar 12, 2023
245f586
Also clear these bits
datdenkikniet Mar 12, 2023
8738c3c
Make all running state public, and use "stateless" access
datdenkikniet Mar 12, 2023
d716770
Slight cleanup
datdenkikniet Mar 12, 2023
5338c4c
Remove these bits, we shouldn't have to set them.
datdenkikniet Mar 12, 2023
50595f3
Also treat RBU and TBU as receive and transmit interrupts
datdenkikniet Mar 12, 2023
a9649dd
Update smoltcp
datdenkikniet Jun 26, 2023
5297797
Merge branch 'master' into h7-take2
datdenkikniet Jun 26, 2023
6ebccc4
Merge branch 'master' into h7-take2
datdenkikniet Jun 28, 2023
d44207c
Merge branch 'master' into h7-take2
datdenkikniet Jun 28, 2023
ef43808
Merge branch 'smoltcp-ptp' into h7-take2
datdenkikniet Jun 28, 2023
968f033
Fix smoltcp-phy without ptp
datdenkikniet Jun 28, 2023
0b3a8d4
Merge branch 'master' into h7-take2
datdenkikniet Jun 28, 2023
f5af9e6
Merge branch 'master' into h7-take2
datdenkikniet Jun 28, 2023
57c7cbe
Merge branch 'master' into h7-take2
datdenkikniet Jul 4, 2023
9640735
Merge branch 'master' into h7-take2
datdenkikniet Jul 26, 2023
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12 changes: 12 additions & 0 deletions .github/workflows/build.yml
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,16 @@ jobs:
- stm32f777
- stm32f778
- stm32f779
- stm32h735
- stm32h742
- stm32h742v
- stm32h743
- stm32h743v
- stm32h747cm7
- stm32h750
- stm32h750v
- stm32h753
- stm32h753v
steps:
- name: Checkout
uses: actions/checkout@v3
Expand Down Expand Up @@ -110,6 +120,7 @@ jobs:
- stm32f107
- stm32f407
- stm32f745
- stm32h735
steps:
- name: Checkout
uses: actions/checkout@v3
Expand Down Expand Up @@ -182,6 +193,7 @@ jobs:
- stm32f107
- stm32f429
- stm32f745
- stm32h735
pins:
- nucleo
- default
Expand Down
18 changes: 18 additions & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@ features = ["smoltcp-phy", "stm32f429", "async-await"]
[dependencies]
volatile-register = "0.2"
aligned = "0.4"
stm32h7xx-hal = { version = "0.13", optional = true }
stm32f7xx-hal = { version = "0.7.0", optional = true }
stm32f4xx-hal = { version = "0.14", optional = true }
stm32f4 = { version = "0.15", optional = true }
Expand All @@ -41,8 +42,14 @@ default = [ "defmt", "ptp" ]
device-selected = []
fence = []
ptp = [ "smoltcp/packetmeta-id" ]
f-series = [ ]
async-await = ["dep:futures"]

stm32f1xx-hal = [ "dep:stm32f1xx-hal", "f-series" ]
stm32f4xx-hal = [ "dep:stm32f4xx-hal", "f-series" ]
stm32f7xx-hal = [ "dep:stm32f7xx-hal", "f-series" ]
stm32h7xx-hal = [ "dep:stm32h7xx-hal" ]

stm32f107 = ["stm32f1xx-hal/stm32f107", "device-selected"]

stm32f407 = ["stm32f4xx-hal/stm32f407", "stm32f4", "device-selected"]
Expand All @@ -64,6 +71,17 @@ stm32f777 = ["stm32f7xx-hal/stm32f777", "device-selected", "fence"]
stm32f778 = ["stm32f7xx-hal/stm32f778", "device-selected", "fence"]
stm32f779 = ["stm32f7xx-hal/stm32f779", "device-selected", "fence"]

stm32h735 = ["device-selected", "fence", "stm32h7xx-hal/stm32h735" ]
stm32h742 = ["device-selected", "fence", "stm32h7xx-hal/stm32h742" ]
stm32h742v = ["device-selected", "fence", "stm32h7xx-hal/stm32h742v" ]
stm32h743 = ["device-selected", "fence", "stm32h7xx-hal/stm32h743" ]
stm32h743v = ["device-selected", "fence", "stm32h7xx-hal/stm32h743v" ]
stm32h747cm7 = ["device-selected", "fence", "stm32h7xx-hal/stm32h747cm7"]
stm32h750 = ["device-selected", "fence", "stm32h7xx-hal/stm32h750" ]
stm32h750v = ["device-selected", "fence", "stm32h7xx-hal/stm32h750v" ]
stm32h753 = ["device-selected", "fence", "stm32h7xx-hal/stm32h753" ]
stm32h753v = ["device-selected", "fence", "stm32h7xx-hal/stm32h753v" ]

smoltcp-phy = ["smoltcp"]

[dev-dependencies]
Expand Down
19 changes: 14 additions & 5 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ use stm32_eth::{
hal::gpio::GpioExt,
hal::rcc::RccExt,
stm32::Peripherals,
dma::{RxRingEntry, TxRingEntry},
dma::{MTU, TxDescriptorRing, TxDescriptor, RxDescriptorRing, RxDescriptor},
EthPins,
};
use fugit::RateExtU32;
Expand All @@ -54,20 +54,29 @@ fn main() {
rx_d1: gpioc.pc5,
};

let mut rx_ring: [RxRingEntry; 16] = Default::default();
let mut tx_ring: [TxRingEntry; 8] = Default::default();
let mut rx_ring: [RxDescriptor; 16] = Default::default();
let mut rx_buffers: [[u8; MTU + 2]; 16] = [[0u8; MTU + 2]; 16];
let rx_ring = RxDescriptorRing::new(&mut rx_ring[..], &mut rx_buffers[..]);

let mut tx_ring: [TxDescriptor; 8] = Default::default();
let mut tx_buffers: [[u8; MTU + 2]; 8] = [[0u8; MTU + 2]; 8];
let tx_ring = TxDescriptorRing::new(&mut tx_ring[..], &mut tx_buffers[..]);

let parts = stm32_eth::PartsIn {
mac: p.ETHERNET_MAC,
#[cfg(any(feature = "stm32f1xx-hal", feature = "stm32f4xx-hal", feature = "stm32f7xx-hal"))]
mmc: p.ETHERNET_MMC,
#[cfg(feature = "stm32h7xx-hal")]
mtl: p.ETHERNET_MTL,
dma: p.ETHERNET_DMA,
#[cfg(any(feature = "stm32f1xx-hal", feature = "stm32f4xx-hal", feature = "stm32f7xx-hal"))]
ptp: p.ETHERNET_PTP,
};

let stm32_eth::Parts { dma: mut eth_dma, mac: _, ptp: _ } = stm32_eth::new(
parts,
&mut rx_ring[..],
&mut tx_ring[..],
rx_ring,
tx_ring,
clocks,
eth_pins,
)
Expand Down
1 change: 0 additions & 1 deletion build.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
fn main() {
#[cfg(feature = "stm32f1xx-hal")]
println!("cargo:rustc-link-search=memory.x");

let hse = std::env::var("STM32_ETH_EXAMPLE_HSE");
Expand Down
16 changes: 5 additions & 11 deletions examples/arp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ use stm32_eth::{

pub mod common;

use stm32_eth::dma::{RxRingEntry, TxError, TxRingEntry};
use stm32_eth::dma::TxError;

const PHY_ADDR: u8 = 0;

Expand All @@ -43,22 +43,14 @@ fn main() -> ! {

let (eth_pins, mdio, mdc, _) = common::setup_pins(gpio);

let mut rx_ring: [RxRingEntry; 2] = Default::default();
let mut tx_ring: [TxRingEntry; 2] = Default::default();
let (rx_ring, tx_ring) = crate::common::setup_rings();

let Parts {
mut dma,
mac,
#[cfg(feature = "ptp")]
ptp: _,
} = stm32_eth::new(
ethernet,
&mut rx_ring[..],
&mut tx_ring[..],
clocks,
eth_pins,
)
.unwrap();
} = stm32_eth::new(ethernet, rx_ring, tx_ring, clocks, eth_pins).unwrap();
dma.enable_interrupt();

let mut last_link_up = false;
Expand Down Expand Up @@ -109,6 +101,8 @@ fn main() -> ! {
buf[38..42].copy_from_slice(&TARGET_IP);
});

stm32_eth::eth_interrupt_handler();

match r {
Ok(()) => {
defmt::info!("ARP sent");
Expand Down
13 changes: 7 additions & 6 deletions examples/async-rtic-timestamp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,10 @@ mod common;

extern crate async_rtic as rtic;

defmt::timestamp!("{=u64:us}", {
(stm32_eth::ptp::EthernetPTP::now().total_nanos() / 1_000) as u64
});

#[rtic::app(device = stm32_eth::stm32, dispatchers = [SPI1])]
mod app {

Expand All @@ -51,7 +55,7 @@ mod app {
use ieee802_3_miim::{phy::PhySpeed, Phy};

use stm32_eth::{
dma::{EthernetDMA, PacketId, RxRing, RxRingEntry, TxRing, TxRingEntry},
dma::{EthernetDMA, PacketId, RxRing, TxRing},
mac::Speed,
ptp::{EthernetPTP, Subseconds, Timestamp},
Parts,
Expand All @@ -66,8 +70,6 @@ mod app {
struct Shared {}

#[init(local = [
rx_ring: [RxRingEntry; 2] = [RxRingEntry::new(),RxRingEntry::new()],
tx_ring: [TxRingEntry; 2] = [TxRingEntry::new(),TxRingEntry::new()],
dma: MaybeUninit<EthernetDMA<'static, 'static>> = MaybeUninit::uninit(),
arbiter: MaybeUninit<Arbiter<EthernetPTP> > = MaybeUninit::uninit(),
// We use a channel to signal when 1 second has passed.
Expand All @@ -79,8 +81,7 @@ mod app {
defmt::info!("Pre-init");
let p = cx.device;

let rx_ring = cx.local.rx_ring;
let tx_ring = cx.local.tx_ring;
let (rx_ring, tx_ring) = crate::common::setup_rings();

let (clocks, gpio, ethernet) = crate::common::setup_peripherals(p);

Expand Down Expand Up @@ -162,7 +163,7 @@ mod app {
continue;
};

defmt::debug!("RX timestamp: {}", rx_timestamp);
defmt::info!("RX timestamp: {}", rx_timestamp);

if dst_mac == [0xAB, 0xCD, 0xEF, 0x12, 0x34, 0x56] {
let mut timestamp_data = [0u8; 8];
Expand Down
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